Who Benefits From Chiplets, And When


Experts at the Table: Semiconductor Engineering sat down to discuss new packaging approaches and integration issues with Anirudh Devgan, president and CEO of Cadence; Joseph Sawicki, executive vice president of Siemens EDA; Niels Faché, vice president and general manager at Keysight; Simon Segars, advisor at Arm; and Aki Fujimura, chairman and CEO of D2S. This discussion was held in front of a... » read more

Week In Review: Design, Low Power


EnSilica listed on the London Stock Exchange's AIM market under the ticker ENSI. EnSilica designs mixed signal ASICs for system developers in the automotive, industrial, healthcare, and communications markets. It also has a portfolio of core IP covering cryptography, radar and communications systems. AIM is the LSE’s market for small and medium sized growth companies. "In connection with Admi... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive, mobility Cadence is now an official technology partner of the McLaren Formula 1 Team. The team will use Cadence’s Fidelity CFD Software to look at the computational fluid dynamics (CFD) of the airflow around the race cars and predict how a car design will affect the airflow. Infineon uncorked its XENSIV 60 GHz automotive radar sensor for in-cabin monitoring systems. One use ca... » read more

How To Optimize A Processor


Optimizing any system is a multi-layered problem, but when it involves a processor there are at least three levels to consider. Architects must be capable of thinking across these boundaries because the role of each of the layers must be both understood and balanced. The first level of potential optimization is at the system level. For example, how does data come in and out of the processing... » read more

Will Big Competition Attract More Talent For IC Companies?


Google is hiring a chip packaging technologist. General Motors is seeking a wafer fabrication procurement specialist. Facebook Reality Labs wants a materials researcher with experience in photolithography and nanoimprint techniques. Recent job postings by tech and automotive giants are enough to worry any chip company executive struggling to attract talent. But what may seem at first like a ... » read more

The Evolving Digital Journey Of The Electronics Value Chain


Digitally transforming how the electronics value chain is traversed will unlock the full innovative potential of system design companies all over the world. By augmenting desktop authoring tools with integrated, native cloud applications that seamlessly connect companies with the electronics value chain, design teams will be empowered to confidently deliver on aggressive requirements, schedules... » read more

High-Level Synthesis: It’s Still Hardware Design


Hardware design using HLS is no different than the typical ASIC/FPGA design flow with the exception that C++/SystemC is being used along with HLS to create the RTL instead of hand coding it. The advantage of using HLS is that it speeds up RTL creation time and reduces verification time by producing bug free RTL quickly from a fully verified C++/SystemC source. The misconception that still exist... » read more

Blog Review: May 25


Coventor's Michael Hargrove points to the need for a new generation of deep-submicron CMOS circuits that can operate at deep-cryogenic temperatures to achieve a quantum integrated circuit where the array of qubits is integrated on the same chip as the CMOS electronics required to read the state of the qubits. Ansys' Marc Swinnen warns about dynamic voltage drop as ultra-low supply voltages, ... » read more

Embedded Software: Sometimes Easier, Often More Complex


Embedded software, once a challenge to write, update, and optimize, is following the route of other types of software. It is abstracted, simpler to use, and much faster to write. But in some cases, it's also much harder to get right. From a conceptual level, the general definition of embedded software has not changed much. It's still low-level drivers and RTOSes that run close to the hardwar... » read more

Standardizing Chiplet Interconnects


The chip industry is making progress on standardizing the infrastructure for chiplets, setting the stage for faster and more predictable integration of different functions and features from different vendors. The ability to choose from a menu of small, highly specialized chips, and to mix and match them for specific applications and use cases, has been on the horizon for more than a decade. ... » read more

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