Tiny Dots, Big Impact: The Luminous World of Quantum Dots


In the early ’80s, Alexey Ekimov and Louis E. Brus independently researched semiconductor clusters, leading to the discovery of quantum dots (QDs). QDs are nanoscale semiconductor particles with unique optical and electronic properties. In 1993, Moungi Bawendi improved quantum dot production, making them nearly perfect for various applications. By the late ’90s and early 2000s, quantum d... » read more

Isolating Critical Data In Failure Analysis


Experts at the Table: Semiconductor Engineering sat down to discuss traceability and the lack of data needed to perform root cause analysis with Frank Chen, director of applications and product management at Bruker Nano Surfaces & Metrology; Mike McIntyre, director of product management in the Enterprise Business Unit at Onto Innovation; Kamran Hakim, ASIC reliability engineer at Teradyne... » read more

Using Smart Data To Boost Semiconductor Reliability


The chip industry is looking to AI and data analytics to improve yield, operational efficiency, and reduce the overall cost of designing and manufacturing complex devices. In fact, SEMI estimates its members could capture more than $60B in revenues associated through smart data use and AI. Getting there, however, requires overcoming a number of persistent obstacles. Smart data utilization is... » read more

Optimizing Metal Film Measurement On IGBT And MOSFET Power Devices With Picosecond Ultrasonic Technology


By Johnny Dai with Cheolkyu Kim and Priya Mukundhan In recent years, power semiconductor applications have expanded from industrial and consumer electronics to renewable energy and electric vehicles. Looking to the future, the most promising power semiconductor devices will be insulated gate bipolar transistor (IGBT) and power metal oxide semiconductor field effect transistor (power MOSFET) ... » read more

Streamlining Failure Analysis Of Chips


Experts at the Table: Semiconductor Engineering sat down to discuss how increasing complexity in semiconductor and packaging technology is driving shifts in failure analysis methods, with Frank Chen, director of applications and product management at Bruker Nano Surfaces & Metrology; Mike McIntyre, director of product management in the Enterprise Business Unit at Onto Innovation; Kamran Hak... » read more

5 Reasons Why Defect Reduction Is Critical In Semiconductor Material Success


Semiconductors may be small, but the impacts they have are significant. Semiconductors used in life-dependent applications, such as pacemakers, defibrillators, life support systems, automotive safety systems, or in aviation need to be fail-proof. A device smaller than a centimeter with features just a few nanometers has no margin of error. This blog shares why it’s important to detect materia... » read more

Fab And Field Data Transforming Manufacturing Processes


The ability to capture, process, and analyze data in the field is transforming semiconductor metrology and testing, providing invaluable insight into a product's performance in real-time and under real-world conditions and use cases. Historically, data that encapsulates parameters such as power consumption, temperature, voltages, currents, timing, and other characteristics, was confined to d... » read more

Navigating the Metrology Maze For GAA FETs


The chip industry is pushing the boundaries of innovation with the evolution of finFETs to gate-all-around (GAA) nanosheet transistors at the 3nm node and beyond, but it also is adding significant new metrology challenges. GAA represents a significant advancement in transistor architecture, where the gate material fully encompasses the nanosheet channel. This approach allows for the vertical... » read more

3D NAND Needs 3D Metrology


By Nick Keller and Andy Antonelli You’ve read the reports: the memory market is floundering as the semiconductor industry moves through another scarcity/surplus cycle. Be that as it may, innovation is happening as the industry continues to pursue increasingly higher three-dimensional stacks, with 3D NAND stacks taller than 200 layers entering production. However, there are challenges... » read more

Demonstrating The Capabilities Of Virtual Wafer Process Modeling And Virtual Metrology


A technical paper titled “Review of virtual wafer process modeling and metrology for advanced technology development” was published by researchers at Coventor Inc., Lam Research. Abstract: "Semiconductor logic and memory technology development continues to push the limits of process complexity and cost, especially as the industry migrates to the 5 nm node and beyond. Optimization of the p... » read more

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