Chip Industry’s Technical Paper Roundup: Dec. 5


New technical papers added to Semiconductor Engineering’s library this week. [table id=67 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for u... » read more

Research Bits: Dec. 5


Protonic programmable resistors for AI Researchers from the Massachusetts Institute of Technology (MIT) developed an analog deep learning processor based on protonic programmable resistors arranged in an array. In the processor, increasing and decreasing the electrical conductance of protonic resistors enables analog machine learning. The conductance is controlled by the movement of protons... » read more

HW Accelerator Architecture for MI Computation With Low Latency, Energy Efficient (MIT)


A new technical paper titled "Efficient Computation of Map-scale Continuous Mutual Information on Chip in Real Time" was published by researchers at MIT. Find the technical paper here. "In this paper, we introduce a new hardware accelerator architecture for MI computation that features a low-latency, energy-efficient MI compute core and an optimized memory subsystem that provides sufficie... » read more

Using Sparseloop in Hardware Accelerator Design Flows (MIT)


A technical paper titled "Sparseloop: An Analytical Approach To Sparse Tensor Accelerator Modeling" was published by researchers at MIT and NVIDIA.  The paper won "Distinguished Artifact Award" at the MICRO 2022 conference. Find the technical paper here.  Published 2022.  Project website is here and github here. Abstract: "In recent years, many accelerators have been proposed to effici... » read more

Optimizing Hardware Capacity, Utilizing Automatic Differentiation to Efficiently Compute Derivatives in Parallel Programming Models


A technical paper titled "Scalable Automatic Differentiation of Multiple Parallel Paradigms through Compiler Augmentation" was published by researchers at MIT (CSAIL), Argonne National Lab, and TU Munich. The paper was a Best Paper Finalist and a Best Student Paper winner at SuperComputing 2022. Find the technical paper here. Published November 2022. The work "demonstrates how Enzyme opti... » read more

Chip Industry’s Technical Paper Roundup: Nov. 29


New technical papers added to Semiconductor Engineering’s library this week. [table id=66 /]   Related Reading: Chip Industry’s Technical Paper Roundup: Nov. 21 New papers: lithography modeling; solving Rowhammer; energy-efficient batch normalization HW; 3-to-1 reconfigurable analog signal modulation circuit; lateral double magnetic tunnel junction; reduce branch mispredic... » read more

New Method For Determining How 2D Materials Expand (MIT)


A new technical paper titled "A unified approach and descriptor for the thermal expansion of two-dimensional transition metal dichalcogenide monolayers" was published by researchers at MIT and Southern University of Science and Technology (China). "A new technique that accurately measures how atom-thin materials expand when heated could help engineers develop faster, more powerful electronic... » read more

Chip Industry’s Technical Paper Roundup: Nov. 15


New technical papers added to Semiconductor Engineering’s library this week. [table id=63 /] » read more

Energy of Computing As A Key Design Aspect (SLAC/Stanford, MIT)


A technical paper titled "Trends in Energy Estimates for Computing in AI/Machine Learning Accelerators, Supercomputers, and Compute-Intensive Applications" was published by researchers at SLAC/Stanford University and MIT. Abstract: "We examine the computational energy requirements of different systems driven by the geometrical scaling law, and increasing use of Artificial Intelligence or Ma... » read more

Research Bits: Nov. 7


ADC side-channel attacks Researchers at MIT propose two ways to protect analog-to-digital converters (ADCs) from power and electromagnetic side-channel attacks. The researchers first investigated the side-channel attacks that could be used against ADCs. Power attacks usually involve an attacker soldering a resistor onto the device’s circuit board to measure its power usage. An electromagn... » read more

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