tag: mixed-signal verification

Demystifying Mixed-Signal Simulation For Digital Verification Engineers
By Cadence - 13 Dec, 2023 - Comments: 0

The convergence of analog and digital technologies on a single chip, commonly referred to as mixed-signal, has reshaped the integrated circuit (IC) landscape. In recent years, mixed-signal designs have emerged as the dominant technology, therefore requiring traditional analog and digital methodologies to be enhanced. A mixed-signal design offers many advantages, including boosted performance, r... » read more

Use Tcl To Save Signals More Efficiently In AMS Simulations
By Qingyu Lin - 28 Sep, 2023 - Comments: 0

Saving signal waveforms during a simulation is one of the basic ways to check the simulation results. However, with large SoC designs, it’s not always practical to save all signals during simulation, and the simulation performance might also be impacted by the number of signals being saved. Therefore, a crucial part of the simulation setup is to specify the expected and essential signals to s... » read more

Efficient Verification Of Mixed-Signal Series IP Using UVM
By Cadence - 21 Sep, 2022 - Comments: 0

Interface IP are an integral part of systems-on-chips (SoC) that include mobile, automotive, or networking applications and are primarily used for transmitting data over a physical medium between a host and device. The mixed-signal nature of the IP makes verification a challenging task, requiring special considerations for digital and analog sections. This paper describes a robust mixed-signal ... » read more

Next-Gen Design Challenges
By Ed Sperling - 20 Apr, 2021 - Comments: 0

As more heterogeneous chips and different types of circuitry are designed into one system, that all needs to be simulated, verified and validated before tape-out. Aveek Sarkar, vice president of engineering at Synopsys, talks with Semiconductor Engineering about the intersection of scale complexity and systemic complexity, the rising number of corners, and the reduced margin with which to buffe... » read more

Culture Clash In Analog
By Ann Mutschler - 29 Oct, 2015 - Comments: 2

The analog/mixed signal world is being shaken up by a mix of new tools, an influx of younger engineers with new and broader approaches, and an emphasis on changing methodologies to improve time to market. Analog and digital engineers have never quite seen eye-to-eye. Analog teams leverage techniques that have been around, in some cases, for decades, while digital teams rely heavily on the la... » read more

Filling In The Gaps For Mixed-Signal Verification
By Ann Mutschler - 24 Nov, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss mixed-signal verification with Haiko Morgenstern, Mixed-Signal Verification Group Staff Engineer at Infineon; Dr. Gernot Koch, CAD Manager at Micronas; Pierluigi Daglio, AMS Design Verification Flows Manager at STMicroelectronics; and Helene Thibieroz, AMS marketing manager at [getentity id="22035" e_name="Synopsys"]. What follows are excerpts of th... » read more

Filling In The Gaps For Mixed-Signal Verification
By Ann Mutschler - 31 Oct, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss mixed-signal verification with Haiko Morgenstern, Mixed-Signal Verification Group Staff Engineer at Infineon; Dr. Gernot Koch, CAD Manager at Micronas; Pierluigi Daglio, AMS Design Verification Flows Manager at STMicroelectronics; and Helene Thibieroz, AMS marketing manager at [getentity id="22035" comment="Synopsys"]. What follows are excerpts of t... » read more

Filling In The Gaps For Mixed-Signal Verification
By Ann Mutschler - 24 Oct, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss mixed-signal [getkc id="10" kc_name="Verification"] with Haiko Morgenstern, Mixed-Signal Verification Group Staff Engineer at Infineon; Dr. Gernot Koch, CAD Manager at Micronas; Pierluigi Daglio, AMS Design Verification Flows Manager at STMicroelectronics; and Helene Thibieroz, AMS marketing manager at [getentity id="22035" comment="Synopsys"]. What... » read more

Solutions For Mixed-Signal SoC Verification Using Real Number Models
By Various Writers - 18 Dec, 2013 - Comments: 0

As old methods fall short, new techniques make advanced SoC verification possible. This paper presents mixed-signal block and IC-level verification methodologies using analog behavioral modeling and combined analog and digital solvers. It then describes analog real number modeling (RNM) and how it is used in top-level SoC verification. To view this white paper, click here. » read more

Solutions For Mixed-Signal SoC Verification
By Various Writers - 28 Mar, 2013 - Comments: 0

Performing full-chip verification of large mixed-signal systems on chip (SoCs) is an increasingly daunting task. As complexity grows and process nodes shrink, it’s no longer adequate to bolt together analog or digital “black boxes” that are presumed to be pre-verified. Complex analog/ digital interactions can create functional errors, which delay tapeouts and lead to costly silicon re-spi... » read more

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