tag: Moore’s Law

The Smartphonification Of Things
By Ann Mutschler - 28 Mar, 2013 - Comments: 0

By Ann Steffora Mutschler The term, ‘Internet of Things,’ was first coined more than a decade ago by technology visionary Kevin Ashton but has slowly trickled down to the world of chip design and is now mentioned constantly in conversation. The reason is simple: System-level design tools are getting sophisticated enough to handle the intricacies required by devices in an Internet of ... » read more

The Learning Imperative
By Tom Morrow - 21 Mar, 2013 - Comments: 0

By Tom Morrow An often under-appreciated component of Moore’s Law has been the massive learning and education effort required to sustain continuous improvement at the incredible rate predicted by Gordon Moore nearly 50 years ago. The industry regularly calculates the contribution of lithography-based scaling, wafer size increases, and yield improvements necessary to keep pace with aggressive... » read more

Computational Lithography
By Various Writers - 21 Mar, 2013 - Comments: 0

Computational lithography has become an integral part of design since the 130 nm process node. New techniques continue to be developed to extend the steady node shrink year after year. To read this white paper, click here. » read more

Moore’s Law 2.0
By Ed Sperling - 14 Mar, 2013 - Comments: 0

By Ed Sperling Doubling the number of transistors on a piece of silicon every 18 to 24 months used to be synonymous with engineering progress, but as the semiconductor world migrates from processors to SoCs the fundamental basis of Moore’s Law is losing its meaning. Even its famous timetable is slipping. For one thing, it’s simply too expensive and difficult to migrate from one node to ... » read more

Foundry Arms Race Under Way
By Mark LaPedus - 21 Feb, 2013 - Comments: 0

By Mark LaPedus A year ago, chipmakers were reeling from a severe shortage of 28nm foundry capacity, prompting foundries to ramp up their fabs at a staggering pace. At the time, foundries were unable to keep up with huge and unforeseen demand for mobile chips. The shortfall was also caused by low yields and the overall lack of installed 28nm capacity. Today, the 28nm crunch is largely ov... » read more

Optical Lithography, Take Two
By Mark LaPedus - 21 Feb, 2013 - Comments: 0

By Mark LaPedus It’s the worst-kept secret in the industry. Extreme ultraviolet (EUV) lithography has missed the initial stages of the 10nm logic and 1xnm NAND flash nodes. Chipmakers hope to insert EUV by the latter stages of 10nm or by 7nm, but vendors are not counting on EUV in the near term and are preparing their back-up plans. Barring a breakthrough with EUV or other technology, IC ... » read more

Accelerating Moore’s Law
By Ed Sperling - 21 Feb, 2013 - Comments: 0

By Ed Sperling Ever since the inception of Moore’s Law, process nodes have moved forward at a rate of once every 18 to 24 months. Companies have been talking about slowing down the rate of progression as things get harder, but at least for the next couple of process nodes something very strange will occur—Moore’s Law will accelerate. The root cause is growing competition for a shrinki... » read more

Good Times For Analog Designers
By Ann Mutschler - 14 Feb, 2013 - Comments: 1

By Ann Steffora Mutschler For a number of technological reasons, analog/mixed-signal design and low-power design are converging, and with that comes both challenges and opportunities. As far as challenges go, process variations at 14nm, 20nm and even 28nm have increased significantly to include DFM impacts such as layout-delay effects. On the digital side, those process changes affect... » read more

Cost Per Transistor Gets Fuzzier
By Ed Sperling - 31 Jan, 2013 - Comments: 0

By Ed Sperling Cost per transistor always has been a major reason for chipmakers to migrate to the next process node. By shrinking transistors and adding more logic, performance usually gets a boost. Moreover, that usually provides enough engineering wiggle room to add some improvements in energy efficiency. The basic assumption that you can double the number of transistors every 24 months,... » read more

Moore’s Law Revisited
By Ed Sperling - 17 Jan, 2013 - Comments: 0

Moore’s Law, for all its re-interpretation, remains an iconic economic statement about doubling transistors over a fixed period of time—despite the fact that the time frame has changed at least twice since Gordon Moore first postulated his formula for shrinking features. Still, you don’t shrink feature sizes unless there is some economic benefit, and increasingly you don’t get an econom... » read more

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