Research Bits: November 21

MoS2 in-memory processor Researchers from École Polytechnique Fédérale de Lausanne (EPFL) developed a large-scale in-memory processor using the 2D semiconductor material, molybdenum disulfide (MoS2), for the channel material in the more than 1,000 transistors that comprise the processor. The MoS2-based in-memory processor is dedicated to vector-matrix multiplication, key for digital signal ... » read more

A New Layered Structure With 2D Material That Exhibits A Unique Transfer Of Energy And Charge

A technical paper titled “Excitation-Dependent High-Lying Excitonic Exchange via Interlayer Energy Transfer from Lower-to-Higher Bandgap 2D Material” was published by researchers at University of Warsaw, Brookhaven National Laboratory, and National Institute for Materials Science (Japan). Abstract: "High light absorption (∼15%) and strong photoluminescence (PL) emission in monolayer (1L... » read more

Demonstrating A Fully-2D-Material Based Device For Temperature Sensing In Cryogenic Regimes

A technical paper titled “I-V-T Characteristics and Temperature Sensor Performance of a Fully-2D WSe2/MoS2 Heterojunction Diode at Cryogenic Temperatures” was published by researchers at Technische Universität Dresden, Institute of Ion Beam Physics and Materials Research, and National Institute for Materials Science. Abstract: "In this work, we demonstrate the usability of a fully-2D-mat... » read more

2D Semiconductor Materials Creep Toward Manufacturing

As transistors scale down, they need thinner channels to achieve adequate channel control. In silicon, though, surface roughness scattering degrades mobility, limiting the ultimate channel thickness to about 3nm. Two-dimensional transition metal dichalcogenides (TMDs), such as MoS2 and WSe2, are attractive in part because they avoid this limitation. With no out-of-plane dangling bonds and at... » read more

Hardware Platform Based on 2D Memtransistors

A new technical paper titled "Hardware implementation of Bayesian network based on two-dimensional memtransistors" from researchers at Penn State University. "In this work, we demonstrate hardware implementation of a BN [Bayesian networks] using a monolithic memtransistor technology based on two-dimensional (2D) semiconductors such as monolayer MoS2. First, we experimentally demonstrate a lo... » read more

Thermal Scanning Probe Lithography

A new technical paper titled "Edge-Contact MoS2 Transistors Fabricated Using Thermal Scanning Probe Lithography" was published by researchers at École Polytechnique Fédérale de Lausanne (EPFL). "Thermal scanning probe lithography (t-SPL) is a gentle alternative to the typically used electron beam lithography to fabricate these devices avoiding the use of electrons, which are well known to... » read more

Scalable Approach to Fabricate Memristor Arrays at Wafer-scale

New technical paper titled "Wafer-scale solution-processed 2D material analog resistive memory array for memory-based computing" from researchers at National University of Singapore and Institute of High Performance Computing, Singapore. Abstract "Realization of high-density and reliable resistive random access memories based on two-dimensional semiconductors is crucial toward their develop... » read more

Vertical MoS2 transistors with sub-1-nm gate lengths

Abstract "Ultra-scaled transistors are of interest in the development of next-generation electronic devices. Although atomically thin molybdenum disulfide (MoS2) transistors have been reported, the fabrication of devices with gate lengths below 1 nm has been challenging. Here we demonstrate side-wall MoS2 transistors with an atomically thin channel and a physical gate length of sub-1 nm ... » read more

Pinpointing the Dominant Component of Contact Resistance to Atomically Thin Semiconductors

Abstract "Achieving good electrical contacts is one of the major challenges in realizing devices based on atomically thin two-dimensional (2D) semiconductors. Several studies have examined this hurdle, but a universal understanding of the contact resistance and an underlying approach to its reduction are currently lacking. In this work we expose the shortcomings of the classical contact resist... » read more

Zero-Bias Power-Detector Circuits based on MoS2 Field-Effect Transistors on Wafer-Scale Flexible Substrates

Abstract: "We demonstrate the design, fabrication, and characterization of wafer-scale, zero-bias power detectors based on two-dimensional MoS2 field effect transistors (FETs). The MoS2 FETs are fabricated using a wafer-scale process on 8 μm thick polyimide film, which in principle serves as flexible substrate. The performances of two CVD-MoS2 sheets, grown with different processes and showi... » read more

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