Testing Embedded MRAM IP For SoCs


The challenges of embedded memory test and repair are well known, including maximizing fault coverage to prevent test escapes and using spare elements to maximize manufacturing yield. With the surge in availability of promising non-volatile memory architectures to augment and potentially replace traditional volatile memories, a new set of SoC level memory test and repair challenges are emerging... » read more

MRAM Process Development And Production Briefing


By Dr. Meng Zhu, Dr. Roman Sappey, and Jeff Barnum MRAM (Magnetoresistive Random-Access Memory) is a type of non-volatile memory (NVM) that utilizes magnetic states to store information. The basic structure of MRAM is a magnetic-tunnel junction (MTJ), which consists of two ferromagnetic (FM) layers separated by an insulating tunnel barrier (Fig.1). When the magnetizations of the two magnetic... » read more

Taming Novel NVM Non-Determinism


New memory technologies may have non-deterministic characteristics that add calibration to the test burden — and may require recalibration during their lifetime. Many of these memories are in development as a result of the search for a storage-class memory (SCM) technology that can bridge the gap between larger, slower memories like flash and faster DRAM memory. There are several approache... » read more