Tackling Verification Challenges With Interconnect Validation Tool

By Various Writers - 17 Oct, 2013 - Comments: 0

An interconnect, also referred to as a bus matrix or fabric, serves as the communication hub of multiple intellectual property (IP) cores inside a system on chip (SoC). As the capacity of today’s SoCs continues to increase dramatically, interconnect verification complexity also grows, considering the master/slave numbers, various protocols, different kinds of transactions, and multi-layered t... » read more

SMP, Asymmetric Multi- processing And The HSA Foundation

By Kurt Shuler - 27 Sep, 2012 - Comments: 0

When we hear the term “multiprocessing,” we often associate it with “symmetric multiprocessing (SMP).” This is because of SMP’s initial prevalence in the high-performance computing world, and now in x86/x64 servers and PCs. However, it’s been known for years that SMP’s ability to scale performance as the number of cores increases is poor. (For more information on SMP’s inability... » read more

The New Multicore Approach

By Ed Sperling - 24 Feb, 2011 - Comments: 0

It’s probably too harsh to say that multicore has been a failure, but it’s flat-out wrong to say it has been successful. Multicore was an inevitable outgrowth of Moore’s Law. You simply can’t keep turning up the frequency for processors at advanced nodes without cooking the chip into oblivion. In theory, four cores running at a much cooler 1GHz should be better than one core running... » read more

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tag: multi-core

Tackling Verification Challenges With Interconnect Validation Tool

SMP, Asymmetric Multi- processing And The HSA Foundation

The New Multicore Approach