Delivering Functional Verification Engagements


With the advent of smarter and higher performing devices, there has been a tremendous increase in design complexity. Driven by new high-end hardware feature and intelligent software requirements, these devices are comprised of multi-core processors and a multitude of interface IP, memory and other analog circuitry, communicating via many different interface protocols. This poses a huge challeng... » read more

DVFS On The Sidelines


Power reduction is one of the most important aspects of chip design these days, but not all power reduction techniques are used equally. Some that were once important are fading and dynamic voltage, and frequency scaling (DVFS) is one of them. What's changed, and will we see a resurgence in the future? What is it? DVFS has physics powerfully in its favor. As Vinod Viswanath, director of res... » read more

Executive Insight: Frankwell Lin


Semiconductor Engineering sat down with Frankwell Lin, president and co-founder of [getentity id="22866" e_name="Andes Technology"], to talk about the IoT, what's required in devices and what will likely change over the next few years. What follows are excerpts of that conversation. SE: What are the big market opportunities in the Asia/Pacific region? Lin: The big market is the [getkc id=... » read more

Advanced Power And Performance Optimization For Multicore SoCs


The Multicore Optimization (MCO) technology in Synopsys Platform Architect provides an environment for early exploration and optimization of complex Multicore SoC (MP-SoC) platforms. It allows quantitative analysis of performance and power metrics to avoid SoC market failure due to underperforming or power hungry architectures. To read more, click here. » read more

The Multicore Processing Conundrum


We drive relentlessly into our technological future and often it seems like we’re upgrading our high-performance vehicle as it speeds forward. That’s no easy task, to be sure. We were roaring along fine, observing Moore’s Law, and then we hit a speed bump. So design teams quickly adopted multi-core designs to compensate for the fact that pushing up speeds on single-core CPUs was a melt... » read more

Keeping Up With The Productivity Challenge


Until recently, EDA software rode the coattails of increasing processor performance as part of its drive to continue providing faster and more powerful development software to the people designing, among other things, the next generation of faster processors. It was a fortuitous ring. Around the turn of the century, with the migration to multi-core computing systems, all of that changed. In ord... » read more

Using Multicore Processors To Accelerate Your High-Performance Embedded Linux Applications


The adoption of Linux is accelerating, as it is becoming the operating system of choice for a variety of embedded applications. However, designers of these performance-intensive, embedded SoCs running Linux or other virtual-memory operating systems are challenged with increasing performance requirements within constant or shrinking power budgets. Most processors either achieve the performance g... » read more

How Reliable Is Your IP?


Almost everyone who has bought a new smartphone, car, home electronics device or appliance either has experienced technical glitches that require a replacement or repair, or they know someone who has experienced these problems. The good news is that only a very small fraction of the electronic glitches or failures can be contributed to hardware design. Most of it is due to manufacturing vari... » read more

Tackling Verification Challenges With Interconnect Validation Tool


An interconnect, also referred to as a bus matrix or fabric, serves as the communication hub of multiple intellectual property (IP) cores inside a system on chip (SoC). As the capacity of today’s SoCs continues to increase dramatically, interconnect verification complexity also grows, considering the master/slave numbers, various protocols, different kinds of transactions, and multi-layered t... » read more

SMP, Asymmetric Multi- processing And The HSA Foundation


When we hear the term “multiprocessing,” we often associate it with “symmetric multiprocessing (SMP).” This is because of SMP’s initial prevalence in the high-performance computing world, and now in x86/x64 servers and PCs. However, it’s been known for years that SMP’s ability to scale performance as the number of cores increases is poor. (For more information on SMP’s inability... » read more

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