tag: multi-die

Enabling Efficient Multi-Die Design Implementation and IP Integration
By Synopsys - 28 Aug, 2024 - Comments: 0

Many industry trends are driving chip developers to consider multi-die designs using advanced 2.5D and 3D technologies. Such designs enable incorporating heterogeneous and homogeneous dies in a single package, increasing density while reducing signal propagation times. However, multi-die designs introduce new challenges that must be addressed by all relevant electronic design automation (EDA) a... » read more

Ensuring Multi-Die Package Quality And Reliability
By Faisal Goriawalla - 08 Aug, 2024 - Comments: 0

Multi-die designs are gaining broader adoption in a wide variety of end applications, including high-performance computing, artificial intelligence (AI), automotive, and mobile. Despite clear advantages, there are new challenges that need to be addressed for successful multi-die realization. This article gives a high-level overview of the multi-die test challenges that go beyond the design p... » read more

Are You Ready For HBM4? A Silicon Lifecycle Management (SLM) Perspective
By Faisal Goriawalla - 06 Aug, 2024 - Comments: 0

Many factors are driving system-on-chip (SoC) developers to adopt multi-die technology, in which multiple dies are stacked in a three-dimensional (3D) configuration. Multi-die systems may make power and thermal issues more complex, and they have required major innovations in electronic design automation (EDA) implementation and test tools. These challenges are more than offset by the advantages... » read more

Effective Monitoring, Test, and Repair of Multi-Die Designs
By Synopsys - 09 Jul, 2024 - Comments: 0

Despite clear advantages, there are numerous new challenges that need to be addressed for successful multi-die realization. The multi-die test challenges include: Bare chiplet level (pre-bond) Probe, dedicated/functional pads for test Test, diagnosis, and repair Interconnects (mid/post-bond) Die-to-die test access Lane test, diagnosis, and repair Multi-die ... » read more

Nascent Chiplet Tech Gaining Attention In Defense and Commercial Industries
By Ben Miller - 30 Nov, 2023 - Comments: 0

The economic benefits derived from Moore's Law have changed, and not for the better. This shift – especially on the manufacturing side of system-on-chip (SoC) devices, has both the defense and commercial customers in the semiconductor industry wondering what will come next. One way to extend Moore's Law's cost, feature, and size benefits is with multi-chip technology, now commonly known as... » read more

Ensuring The Health And Reliability Of Multi-Die Systems
By Yervant Zorian - 26 Oct, 2023 - Comments: 0

From generative AI tools that rapidly produce chatbot responses to high-performance computing (HPC) applications enabling financial forecasting and weather modeling, it’s clear we’re in a whole new realm of processing power demand. Given these compute-intensive workloads, monolithic SoCs are no longer capable to meet today’s processing needs. Engineering ingenuity, however, has answered t... » read more

How Quickly Will Multi-Die Systems Change Semiconductor Design?
By Synopsys - 04 Oct, 2023 - Comments: 0

For many decades, semiconductor design and implementation has been focused on monolithic, ever-larger and more complex single-chip implementation. This system-on-chip approach is now changing for a variety of reasons. The new frontier utilizes many chips assembled in new ways to deliver the required form-factor and performance. Multi-die systems are paving the way for new types of semiconduc... » read more

From Known Good Die To Known Good System With UCIe IP
By Manuel Mota - 11 May, 2023 - Comments: 0

Multi-die systems are made up of several specialized functional dies (or chiplets) that are assembled in the same package to create the complete system. Multi-die systems have recently emerged as a solution to overcome the slowing down of Moore’s law by providing a path to scaling functionality in the packaged chip in a way that is manufacturable with good yield. Additionally, multi-die sy... » read more

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