tag: multi patterning

Atomic Layer Etch Heats Up
By Mark LaPedus - 29 Jun, 2016 - Comments: 0

The atomic layer etch (ALE) market is starting to heat up as chipmakers push to 10nm and beyond. ALE is a promising next-generation etch technology that has been in R&D for the last several years, but until now there has been little or no need to use it. Unlike conventional etch tools, which remove materials on a continuous basis, ALE promises to selectively and precisely remove targete... » read more

Plotting The Next Semiconductor Road Map
By Ed Sperling - 13 Jun, 2016 - Comments: 0

The semiconductor industry is retrenching around new technologies and markets as Moore's Law becomes harder to sustain and growth rates in smart phones continue to flatten. In the past, it was a sure bet that pushing to the next process node would provide improvements in power, performance and cost. But after 22nm, the economics change due to the need for multi-patterning and finFETs, and th... » read more

Bulk CMOS Vs. FD-SOI
By Mark LaPedus - 19 May, 2016 - Comments: 2

The leading edge of the chip market increasingly is divided over whether to move to finFETs or whether to stay at 28nm using different materials and potentially even advanced packaging. Decisions about which approach to take frequently boil down to performance, power, form factor, cost, and the maturity of the individual technologies. All of those can vary by market, by vendor and by process... » read more

What Happened To DSA?
By Mark LaPedus - 19 May, 2016 - Comments: 2

Directed self-assembly (DSA) was until recently a rising star in the next-generation lithography (NGL) landscape, but the technology has recently lost some of its luster, if not its momentum. So what happened? Nearly five years ago, an obscure patterning technology called [gettech id="31046" t_name="DSA"] burst onto the scene and began to generate momentum in the industry. At about that t... » read more

Assume Nothing: Clearing Up Common Misconceptions About Multi-Patterning
By Mentor, a Siemens Business - 18 May, 2016 - Comments: 0

Multi-patterning (MP) makes IC design and manufacture possible at advanced nodes, and Calibre Multi-Patterning technology automates the MP process. However, the complexity of MP and the potential costs of failure require a clear understanding of the process and its limitations. Even though MP has been used for several nodes, there are still some serious disconnects in industry expectations and ... » read more

7nm Fab Challenges
By Mark LaPedus - 21 Apr, 2016 - Comments: 3

Leading-edge foundry vendors have made the challenging transition from traditional planar processes into the finFET transistor era. The first [getkc id="185" kc_name="finFETs"] were based on the 22nm node, and now the industry is ramping up 16nm/14nm technologies. Going forward, the question is how far the finFET can be scaled. In fact, 10nm finFETs from Samsung are expected to ramp by ye... » read more

Calibre xACT Parasitic Extraction Supports Signal Integrity At Advanced Nodes
By Mentor, a Siemens Business - 21 Apr, 2016 - Comments: 0

At advanced nodes, signal integrity analysis requires precise characterization, which in turn requires an accurate extracted netlist. Models that handle new impacts on parasitic extraction at advanced nodes, including multi-patterning, finFETs, and resistance and capacitance effects, must be used. Learn how the Calibre xACT extraction tool supports these advanced foundry device models and leadi... » read more

Inside Process Technology
By Mark LaPedus - 21 Apr, 2016 - Comments: 1

Semiconductor Engineering sat down to discuss the foundry business, memory, process technology, lithography and other topics with David Fried, chief technology officer at [getentity id="22210" e_name="Coventor"], a supplier of predictive modeling tools. What follows are excerpts of that conversation. SE: Chipmakers are ramping up 16nm/14nm finFETs today, with 10nm and 7nm finFETs just around... » read more

Pain Points At 7nm
By Ed Sperling - 24 Mar, 2016 - Comments: 3

Early work has begun on 7nm. Process technology has progressed to the point where IP and tools are being qualified. There is still a long way to go. But as companies begin engaging with foundries on this process node—[getentity id="22586" comment="TSMC"] is talking publicly about it, but [getentity id="22846" e_name="Intel"], [getentity id="22819" comment="GlobalFoundries"] and [getentity ... » read more

7nm Lithography Choices
By Mark LaPedus - 07 Mar, 2016 - Comments: 2

Chipmakers are ramping up their 16nm/14nm logic processes, with 10nm expected to move into early production later this year. Barring a major breakthrough in lithography, chipmakers are using today’s 193nm immersion and multiple patterning for both 16/14nm and 10nm. Now, chipmakers are focusing on the lithography options for 7nm. For this, they hope to use a combination of two technologies ... » read more

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