tag: multi patterning

1xnm DRAM Challenges
By Mark LaPedus - 18 Feb, 2016 - Comments: 3

At a recent event, Samsung presented a paper that described how the company plans to extend today’s planar DRAMs down to 20nm and beyond. This is an amazing feat. Until very recently, most engineers believed DRAMs would stop scaling at 20nm or so. Instead, Samsung is ramping up the world’s most advanced DRAMs—a line of 20nm parts—with plans to go even further. Micron and SK Hynix soo... » read more

When And How Should I Color My DP layout?
By David Abercrombie - 18 Feb, 2016 - Comments: 0

Designers working with advanced process technologies that require double patterning often find themselves puzzling over the best way to setup or optimize their design flows to ensure their layouts can be decomposed without time-wasting mistakes. Because manual coloring can be challenging even for experienced engineers, many prefer to use automated coloring solutions. But when is the best time a... » read more

5nm Fab Challenges
By Mark LaPedus - 21 Jan, 2016 - Comments: 2

At a recent event, Intel presented a paper that generated sparks and fueled speculation regarding the future direction of the leading-edge IC industry. The company described a next-generation transistor called the nanowire FET, which is a finFET turned on its side with a gate wrapped around it. Intel’s nanowire FET, sometimes called a gate-all-around FET, is said to meet the device require... » read more

Tech Talk: Double-Triple Patterning
By Brian Bailey - 21 Jan, 2016 - Comments: 0

Mentor Graphics' David Abercrombie shows the differences and challenges in double patterning versus triple patterning. [youtube vid= e0wZmjBbEf0] » read more

When Order Matters
By Mentor, a Siemens Business - 17 Dec, 2015 - Comments: 0

Debugging DP errors can be not only time-consuming, but also frustrating, when new errors seem to appear out of nowhere. The order in which you address DP errors can make a significant difference in the efficiency of your debug efforts. Learning the sequence of ordered DP debugging explained in this white paper can not only help you reduce the time you spend analyzing and fixing DP errors, but ... » read more

Resetting Expectations On Multi-Patterning Decomposition And Checking
By David Abercrombie - 17 Dec, 2015 - Comments: 0

As I said in Part 1 of this topic, it never ceases to amaze me how much confusion and misunderstanding there is when it comes to multi-patterning (MP) decomposition and checking. That entire first article only focused on the typical subjects I’ve had to discuss with customers regarding double-patterning (DP). I have to tell you that with the deployment of triple-patterning (TP) and quadruple-... » read more

Inside Multi-Beam E-Beam Lithography
By Mark LaPedus - 19 Nov, 2015 - Comments: 4

Semiconductor Engineering sat down with David Lam, chairman of Multibeam, a developer of multi-beam e-beam tools for direct-write lithography applications. Lam is also a venture capitalist. He founded Lam Research in 1980, but left as an employee in 1985. What follows are excerpts of that conversation. SE: How has the equipment business changed over the years and what’s the state of the i... » read more

Appetite For Services Grows
By Ed Sperling - 11 Sep, 2015 - Comments: 0

Semiconductor service revenues have been growing for the past year, fueled by complex thermal and power issues at advanced nodes, the difficulty of integrating more and more IP blocks, and far more techniques, languages and methodologies that engineers need to learn to be productive in the finFET generation. The services business typically acts as a bridge between down and up cycles in the c... » read more

New Options For Power
By Ed Sperling - 10 Sep, 2015 - Comments: 0

Chipmakers have been talking for years about the next big breakthrough in battery technology, low-power architectures and energy harvesting. So far, none of them has made their job any easier. Batteries empty out too quickly, and the technology for improving the amount of energy that can be stored don't improve fast enough—or safely enough when they do show big improvements—to make a big... » read more

Electronic Gas Concerns On The Rise
By Ed Sperling - 20 Aug, 2015 - Comments: 0

In the grand scheme of the semiconductor supply chain, electronic gases are something most engineers and scientists never think about. Behind the gleaming machinery and brightly labeled tubes, however, these gases allow wafers to be etched, kept at optimum temperatures, and prepared for the application of thin films. Electronic gases are remarkably well managed in high-volume fabs, which is ... » read more

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