Working With The NimbleAI Project To Push The Boundaries Of Neuromorphic Vision


At the end of 2022, the EU kicked off a cool project that aims to implement neuromorphic vision. But what is that? Let’s take a deeper look at the project and our contribution. First, if you are not familiar with Codasip Labs, I want to mention this briefly. Codasip Labs is in fact our innovation hub where we explore new technologies and try to contribute to the technology of the future. ... » read more

Information flow policies for NVM Technologies


A new technical paper titled "Automated Information Flow Analysis for Integrated Computing-in-Memory Modules" was published by researchers at RWTH Aachen University. Abstract: "Novel non-volatile memory (NVM) technologies offer high-speed and high-density data storage. In addition, they overcome the von Neumann bottleneck by enabling computing-in-memory (CIM). Various computer architectures... » read more

Solving The Reliability Problem Of Memristor-Based Artificial Neural Networks


A technical paper titled "ReMeCo: Reliable Memristor-Based in-Memory Neuromorphic Computation" was published by researchers at Eindhoven University of Technology, University of Tehran, and USC. Abstract: "Memristor-based in-memory neuromorphic computing systems promise a highly efficient implementation of vector-matrix multiplications, commonly used in artificial neural networks (ANNs). H... » read more

Hardware Platform Based on 2D Memtransistors


A new technical paper titled "Hardware implementation of Bayesian network based on two-dimensional memtransistors" from researchers at Penn State University. "In this work, we demonstrate hardware implementation of a BN [Bayesian networks] using a monolithic memtransistor technology based on two-dimensional (2D) semiconductors such as monolayer MoS2. First, we experimentally demonstrate a lo... » read more

State Of The Art And Recent Progress of Reconfigurable Electronic Devices Based on 2D Materials


A new technical paper titled "Emerging reconfigurable electronic devices based on two-dimensional materials: A review" was just published by researchers at TU Dresden, NaMLAb gGmbH, and RWTH Aachen University. Abstract "As the dimensions of the transistor, the key element of silicon technology, are approaching their physical limits, developing semiconductor technology with novel concepts an... » read more

Efficient Neuromorphic AI Chip: “NeuroRRAM”


New technical paper titled "A compute-in-memory chip based on resistive random-access memory" was published by a team of international researchers at Stanford, UCSD, University of Pittsburgh, University of Notre Dame and Tsinghua University. The paper's abstract states "by co-optimizing across all hierarchies of the design from algorithms and architecture to circuits and devices, we present ... » read more

Univ. of Manchester & Shandong Univ.–Synaptic Transistors


Research paper titled "Synaptic transistors with a memory time tunability over seven orders of magnitude" from researchers at The University of Manchester (UK) and Shandong Technology Center of Nanodevices and Integration, School of Microelectronics, Shandong University, China. Abstract "The human brain is capable of short- and long-term memory with retention times ranging from a few second... » read more

Technical Paper Round-up: June 14


New technical papers added to Semiconductor Engineering’s library this week. [table id=33 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit f... » read more

MIT: Stackable AI Chip With Lego-style Design


New technical paper titled "Reconfigurable heterogeneous integration using stackable chips with embedded artificial intelligence" from researchers at MIT, along with Harvard University, Tsinghua University, Zhejiang University, and others. Partial Abstract: "Here we report stackable hetero-integrated chips that use optoelectronic device arrays for chip-to-chip communication and neuromorphic... » read more

Scalable Approach to Fabricate Memristor Arrays at Wafer-scale


New technical paper titled "Wafer-scale solution-processed 2D material analog resistive memory array for memory-based computing" from researchers at National University of Singapore and Institute of High Performance Computing, Singapore. Abstract "Realization of high-density and reliable resistive random access memories based on two-dimensional semiconductors is crucial toward their develop... » read more

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