An Entangled Heterarchy


For decades, a form of structural hierarchy has been the principal means of handling complexity in chip design. It's not always perfect, and there is no ideal way in which to divide and conquer because that would need to focus on the analysis being performed. In fact, most systems can be viewed from a variety of different hierarchies, equally correct, and together forming a heterarchy. The e... » read more

A Survey Of Recent Advances And Research Activities In Wireless NoC Security


A technical paper titled “Wireless Network-on-Chip Security Review: Attack Taxonomy, Implications, and Countermeasures” was published by researchers at Macquarie University (Sydney). Abstract: "Network-on-chip (NoC) is a critical on-chip communication framework that underpins high-performance multicore computing and network system architectures. Its adoption has become widespread due to t... » read more

Network-on-Chips Enabling Artificial Intelligence/Machine Learning Everywhere


Recently, I attended the AI HW Summit in Santa Clara and Autosens in Brussels. Artificial intelligence and machine learning (AI/ML) were critical themes for both events, albeit from different angles. While AI/ML as a buzzword is very popular these days in all its good and bad ways, in discussions with customers and prospects, it became clear that we need to be precise in defining what type of A... » read more

IBM’s Energy-Efficient NorthPole AI Unit


At this point it is well known that from an energy efficiency standpoint, the biggest bang for the back is to be found at the highest levels of abstraction. Fitting the right architecture to the task at hand i.e., an application specific architecture, will lead to benefits that are hard or impossible to claw back later in the design and implementation flow.  With the huge increase in the inter... » read more

Design Complexity In The Golden Age Of Semiconductors


While writing last month's blog that used some of the trend charts we have seen, I noticed that a lot of the data ends in 2020 or earlier, but I was too close to the deadline to sit down and make orderly updates to some of the charts. Working day-to-day in the area of SoC integration and networks-on-chips (NoCs), the classic chart based on Karl Rupp's now 50 years of processor data that overlay... » read more

NoC Obfuscation For Protecting Against Reverse Engineering Attacks (U. Of Florida)


A technical paper titled "ObNoCs: Protecting Network-on-Chip Fabrics Against Reverse-Engineering Attacks" was published by researchers at University of Florida. Abstract: "Modern System-on-Chip designs typically use Network-on-Chip (NoC) fabrics to implement coordination among integrated hardware blocks. An important class of security vulnerabilities involves a rogue foundry reverse-engineeri... » read more

The Architect’s Dilemma And Closing The Loop With Implementation


Gordon Moore has left a mark on our industry. Moore's Law has shaped decades of development. The EDA industry has been moving up the layers of abstraction to increase the productivity and predictability of design flows in our efforts to address the ever-increasing complexity of semiconductors and electronics developments. I had written about it in "Chasing The Next Level Of Productivity" not lo... » read more

Physically Aware NoCs


More functions, greater security risks, and increasingly complicated integration of IP and various components below 7nm is increasing the time and effort it takes to get a functioning chip out the door. In many of these devices, the network on chip is the glue between various components, but it can take up to 10% to 12% of the total area of the SoC. Andy Nightingale, vice president of product m... » read more

The Game Of Ecosystems Intensifies


You may know about my fascination with ecosystems if you have followed my writing. It is only fitting that I am writing this Blog in Munich (shiver, it's cold), where I attended the GSA McKinsey workshop on "Distributed E/E Architectures and Zonal Computing." This workshop had attendees from semiconductor foundries, EDA vendors, IP vendors, Tier 1 Semis, Tier 2 Integrators, software vendors, an... » read more

Considering Semiconductor Implementation Aspects Early During Network-on-Chip Development


As they say, while history may not repeat itself, it sure rhymes. In 2015, I wrote the blog "Why Implementation Matters To System Design And Software." At the time, I mused that while abstraction is essential in system design, it has limitations that users must consider. Critical decisions, such as those regarding power and performance, require more accuracy than can be feasibly abstracted. ... » read more

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