tag: Nvidia

Combination of AI Techniques To Find The Best Ways to Place Transistors on Silicon Chips
By Technical Paper Link - 30 Mar, 2023 - Comments: 0

A new technical paper titled "AutoDMP: Automated DREAMPlace-based Macro Placement" was published by researchers at NVIDIA. Abstract: "Macro placement is a critical very large-scale integration (VLSI) physical design problem that significantly impacts the design power-performance-area (PPA) metrics. This paper proposes AutoDMP, a methodology that leverages DREAMPlace, a GPU-accelerated place... » read more

Week In Review: Manufacturing, Test
By Karen Heyman - 24 Mar, 2023 - Comments: 0

TEL announced plans to build a ¥2.2 billion ($168.2 million) production and logistics center at its Tohoku Office to increase capacity. Construction of the 57,000m² facility, which will be used for manufacturing thermal processing and single-wafer deposition systems, is slated to start in spring 2024, and expected to be completed in fall 2025. Toshiba's board voted in favor of a 2 trillio... » read more

Week In Review: Design, Low Power
By Linda Christensen - 24 Mar, 2023 - Comments: 0

Renesas will acquire Panthronics, a fabless semiconductor company specializing in high-performance wireless products, expanding its reach into near-field communications for financial, IoT, asset tracking, wireless charging, and automotive applications. The two companies already had collaborated on designs for mobile point-of-sale terminals, wireless charging, and smart metering. Renesas also... » read more

Chip Industry’s Technical Paper Roundup: Mar. 21
By Linda Christensen - 21 Mar, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=88 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us ... » read more

Learning The AMS Circuit Representation From Layout Positions (UT Austin/ NVIDIA)
By Technical Paper Link - 15 Mar, 2023 - Comments: 0

A recent technical paper titled "TAG: Learning Circuit Spatial Embedding From Layouts" was published by researchers at UT Austin and NVIDIA. Abstract "Analog and mixed-signal (AMS) circuit designs still rely on human design expertise. Machine learning has been assisting circuit design automation by replacing human experience with artificial intelligence. This paper presents TAG, a new parad... » read more

Blog Review: March 15
By Jesse Allen - 15 Mar, 2023 - Comments: 0

Siemens EDA's Dan Yu finds that high-quality, well-connected mass data are crucial to the success of applying machine learning to verification and recommends teams pivot to a data-centric workflow. Synopsys' Shankar Krishnamoorthy suggests that deploying AI-driven chip design and verification can free teams from iterative work, letting them focus instead on product differentiation and PPA en... » read more

Blog Review: March 8
By Jesse Allen - 08 Mar, 2023 - Comments: 0

Synopsys' Rahul Thukral and Bhavana Chaurasia find that embedded MRAM is undergoing an uplift in utilization for low-power, advanced-node SoCs thanks to its high capacity, high density, and ability to scale to lower geometries. Siemens EDA's Chris Spear dives into the UVM Factory with a look at the  SystemVerilog Object-Oriented Programming concepts behind the factory. Cadence's Veena Pa... » read more

Standards: The Next Step For Silicon Photonics
By Karen Heyman - 07 Mar, 2023 - Comments: 0

Testing silicon photonics is becoming more critical and more complicated as the technology is used in new applications ranging from medicine to cryptography, lidar, and quantum computing, but how to do that in a way that is both consistent and predictable is still unresolved. For the past three decades, photonics largely has been an enabler for high-speed communications, a lucrative market t... » read more

Blog Review: March 1
By Jesse Allen - 01 Mar, 2023 - Comments: 0

Siemens EDA's Chris Spear explains the UVM Factory and how it can facilitate collaboration by enabling injection of new features without affecting your team. Cadence's Paul McLellan looks at efforts to ensure chiplets from different companies work together, particularly when the creating companies didn't pre-plan for those specific chiplets to work together, as well as the problems of failur... » read more

Blog Review: Feb. 22
By Jesse Allen - 22 Feb, 2023 - Comments: 0

Siemens EDA's Harry Foster observes that the FPGA market continues to go through a similar complexity curve that the IC/ASIC market experienced in the early and mid-2000 timeframe. Synopsys' Mitch Heins explores the benefits of heterogeneous integration of lasers and active gain elements in a silicon-based photonic IC, including reduced system costs, size, weight, and power along with improv... » read more

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