tag: Onto Innovation

Large-Field, Fine-Resolution Lithography Enables Next-Generation Panel-Level Packaging
By Onto Innovation - 11 Jan, 2022 - Comments: 0

The lithography challenge for large heterogeneous integration is the limited size of the exposure field (typically 60mm x 60mm or less) for most currently available lithography systems. Fine resolution and a large field size provide the user with the opportunity to increase the package size beyond 150mm x 150mm and maintain high throughput. This new capability has the potential to pave the ... » read more

GaN Application Base Widens, Adoption Grows
By Patrick Waurzyniak - 16 Dec, 2021 - Comments: 0

Gallium nitride (GaN) is beginning to show up across a broad range of power semiconductor applications due to its wide bandgap, enabling fast-charging, very high speeds, and much smaller form factors than silicon-based chips. Unlike silicon carbide (SiC), another wide-bandgap technology, GaN is a lateral rather than a vertical device. GaN tops out at about 900 volts, which limits its use in ... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 10 Dec, 2021 - Comments: 0

Semicon West news The Semicon West trade show opened this week with a hybrid in-person and virtual event. Several companies introduced new products or made announcements at Semicon. Some announcements coincided with the show. At Semicon, Lam Research introduced the Syndion GP, a new product that provides deep silicon etch capabilities to chipmakers developing next-generation power devices a... » read more

Using Manufacturing Data To Boost Reliability
By Ed Sperling and Ann Mutschler - 07 Dec, 2021 - Comments: 0

As chipmakers turn to increasingly customized and complex heterogeneous designs to boost performance per watt, they also are demanding lower defectivity and higher yields to help offset the rising design and manufacturing costs. Solving those issues is a mammoth multi-vendor effort. There can be hundreds of process steps in fabs and packaging houses. And as feature sizes continue to shrink, ... » read more

The 5G Rollout: Solving Advanced RF Metrology Challenges
By Johnny Dai - 07 Dec, 2021 - Comments: 0

The global radio frequency (RF) semiconductor market size is growing rapidly at a compound annual growth rate of 8.5%, with an expected increase from $17.4 billion in 2020 to $26.2 billion in 2025, according to Research and Markets [1]. As many are aware, the rollout of 5G technology and the Internet of Things (IoT), which is enabled by 5G, are the main driving forces for this growth. Growth... » read more

Big Payback For Combining Different Types Of Fab Data
By Anne Meixner - 07 Dec, 2021 - Comments: 1

Collecting and combining diverse data types from different manufacturing processes can play a significant role in improving semiconductor yield, quality, and reliability, but making that happen requires integrating deep domain expertise from various different process steps and sifting through huge volumes of data scattered across a global supply chain. The semiconductor manufacturing IC data... » read more

Extremely Large Exposure Field With Fine Resolution Lithography Technology To Enable Next Generation Panel Level Advanced Packaging
By Onto Innovation - 07 Dec, 2021 - Comments: 0

The growing demand for heterogeneous integration is driven by the 5G market that includes smartphones, data centers, servers, HPC, AI and IoT applications. Next-generation packaging technologies require tighter overlay to accommodate a larger package size with finer pitch chip interconnects on large format flexible panels. Heterogeneous integration enables next-generation device performance ... » read more

Enablers And Barriers For Connecting Diverse Data
By Anne Meixner - 09 Nov, 2021 - Comments: 0

More data is being collected at every step of the manufacturing process, raising the possibility of combining data in new ways to solve engineering problems. But this is far from simple, and combining results is not always possible. The semiconductor industry’s thirst for data has created oceans of it from the manufacturing process. In addition, semiconductor designs large and small now ha... » read more

More Errors, More Correction in Memories
By Bryon Moyer - 09 Nov, 2021 - Comments: 1

As memory bit cells of any type become smaller, bit error rates increase due to lower margins and process variation. This can be dealt with using error correction to account for and correct bit errors, but as more sophisticated error-correction codes (ECC) are used, it requires more silicon area, which in turn drives up the cost. Given this trend, the looming question is whether the cost of ... » read more

Coping With Parallel Test Site-to-Site Variation
By Anne Meixner - 09 Nov, 2021 - Comments: 1

Testing multiple devices in parallel using the same ATE results in reduced test time and lower costs, but it requires engineering finesse to make it so. Minimizing test measurement variation for each device under test (DUT) is a multi-physics problem, and it's one that is becoming more essential to resolve at each new process node and in multi-chip packages. It requires synchronization of el... » read more

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