More Than Moore

By Ed Sperling - 01 Oct, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss the value of feature shrinks and what comes next with Steve Eplett, design technology and automation manager at [getentity id="22664" e_name="Open-Silicon"]; Patrick Soheili, vice president and general manager of IP Solutions at [getentity id="22242" e_name="eSilicon"]; Brandon Wang, engineering group director at [getentity id="22032" e_name="Cadenc... » read more

IoT Growing Pains

By Ed Sperling - 04 Sep, 2014 - Comments: 0

The Internet of Things is having one of those defining moments — and not in a good way. Only a limited number of things will work together at first. Only in rare case will they actually cross boundaries between vertical markets such as consumer or home, automotive and medical. And in no cases will there be any guarantees, at least in the short term, that communications will be reliable, secur... » read more

Ready To Pounce

By Ed Sperling - 21 Aug, 2014 - Comments: 0

A series of inflection points at 16/14nm and beyond is having a rather unusual effect on the semiconductor industry. Rather than forge ahead with the next nodes to gain an edge and early lead over rivals—the standard formula for success over the past five decades—the entire supply chain is poised on the edge, waiting for someone to make the first move before they take action. The problem... » read more

When Will 2.5D Cut Costs?

By Brian Bailey - 07 Aug, 2014 - Comments: 2

There is a constant drive to reduce costs within the semiconductor industry and, up until now, [getkc id="74" comment="Moore's Law"] provided an easy path to enable this. By adopting each smaller node, transistors were cheaper, but that is no longer the case, as explained in a recent article. The industry will need to find new technologies to make this happen and some people are looking towards... » read more

Foundries Versus OSATs

By Ed Sperling - 24 Jul, 2014 - Comments: 2

Since the 1990s, commercial foundries have ruled semiconductor manufacturing while the [getkc id='83' comment='OSAT'] providers (OSATs) have dominated IC packaging and testing. But as the industry moves toward stacked die over the next couple of years, and big foundries see a chance to expand their reach, the stage is set for an all-out war. There is much at stake on both sides. Foundries g... » read more

How To Lower LED Costs

By Mark LaPedus - 17 Jul, 2014 - Comments: 2

The LED market remains hot, particularly in the solid-state lighting segment. In fact, solid-state lighting continues to expand amid a precipitous drop in LED prices. And LEDs are expanding into new fronts, such as automotive and intelligent lighting. The LED boom hasn’t been fun for all parties, however. Amid pressure to reduce their tool costs, LED equipment makers are still in the mids... » read more

Mobile Packaging Market Heats Up

By Mark LaPedus - 19 Jun, 2014 - Comments: 0

Apple, Samsung and others are developing the next wave of smartphones and tablets. OEMs want to cram more chip functions in smaller IC packages, but there are some challenges in the arena. In fact, there are signs that the mainstream packaging technology for mobiles is running out of steam. For some time, mobile products have incorporated a technology called package-on-package (PoP), which u... » read more

Semicon West Preview: Packaging

By SEMI - 09 Jun, 2014 - Comments: 0

By Paula Doe The evolving mobile device market means the packaging, assembly and test supply chain faces a growing range of alternative technologies vying for its investment dollar, everything from Google’s modular electronics with 3D printing, to more solutions for integrating varied chips in smaller packaged systems. One potentially disruptive change is the wider use of more open-source... » read more

Improving Yield Of 2.5D Designs

By Ann Mutschler - 18 Apr, 2014 - Comments: 0

While progress is being made on the packaging side of 2.5D design, more needs to be resolved when it comes to improving yields. Proponents of 2.5D present compelling benefits. Arif Rahman, a product architect at Altera, noted that the industry trend of silicon convergence is leading to multiple technologies being integrated into single-chip solutions. “2.5D/3D integration has multiple adva... » read more

More Pain In More Places

By Ed Sperling - 14 Mar, 2014 - Comments: 2

Pain is nothing new in to the semiconductor industry. In fact, the pain of getting complex designs completed on budget, and finding the bugs in those designs, has been responsible for decades of continuous growth in EDA, IP, test, packaging, and foundries. But going forward there is change afoot in every segment of the flow from architecture to design to layout to verification to manufacturi... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

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