USB4: User Expectations Drive Design Complexity


This white paper outlines the capabilities of USB4 Hosts, Hubs, Docks, and Devices with an emphasis on how end-user expectations drive the complexity of USB4 products. USB4 is the most complex USB specification so far and requires designers to understand the USB4, USB 3.2, USB 2.0, USB Type-C, and the USB Power Delivery specifications. Designers must also understand PCIe and DisplayPort specifi... » read more

Power Impact At The Physical Layer Causes Downstream Effects


Data movement is rapidly emerging as one of the top design challenges, and it is being complicated by new chip architectures and physical effects caused by increasing density at advanced nodes and in multi-chip systems. Until the introduction of the latest revs of high-bandwidth memory, as well as GDDR6, memory was considered the next big bottleneck. But other compute bottlenecks have been e... » read more

Connecting Emulated Designs To Real PCIe Devices


These days verification teams no longer question whether hardware assisted verification should be used in their projects. Rather, they ask at which stage they should start using it. Contemporary System-on-Chip (SoC) designs are already sufficiently complex to make HDL simulation a bottleneck during verification, without even mentioning hardware-software co-verification or firmware and softwa... » read more

Which Chip Interconnect Protocol Is Better?


Semiconductor Engineering sat down to the discuss the pros and cons of the Compute Express Link (CXL) and the Cache Coherent Interconnect for Accelerators (CCIX) with Kurt Shuler, vice president of marketing at Arteris IP; Richard Solomon, technical marketing manager for PCI Express controller IP at Synopsys; and Jitendra Mohan, CEO of Astera Labs. What follows are excerpts of that conversation... » read more

Hybrid Prototyping


David Svensson, applications engineer in Synopsys’ Verification Group, explains how a virtual transaction logic model can be connected to develop hardware-dependent drivers before RTL actually exists, why this is now critical for large, complex designs, and how to find the potential bottlenecks and debug both software and hardware. » read more

A New Dawn For IP


The IP industry is changing again. The concept started as build once, use everywhere, but today it is more like architect once, customize everywhere. Few designs can afford sub-optimal IP for their application. The need for customized IP is driven by both leading-edge designs and the trailing markets, although for different reasons. While this customization is causing IP companies to transfo... » read more

CXL Vs. CCIX


Kurt Shuler, vice president of marketing at ArterisIP, explains how these two standards differ, which one works best where, and what each was designed for. » read more

Using PCIe Real World Interface For High-Speed Hybrid Prototyping


This white paper highlights a novel approach to hybrid prototyping using a PCIe interface between the HAPS FPGA-based prototyping and the Virtualizer virtual prototyping. The use of PCIe real world interface helps to deliver a prototyping system, running fast enough to enable embedded software development and hardware-software co-validation in the shortest possible time. The hybrid prototyping ... » read more

Which Verification Engine When


Frank Schirrmeister, group director for product marketing at Cadence, talks about which tools get used throughout the design flow, from architecture to simulation, formal verification, emulation, prototyping all the way to production, how the cloud has impacted the direction of the flow, and how machine learning will impact verification. » read more

Week in Review: IoT, Security, Autos


Products/Services Rambus reports completing the sale of its Payments and Ticketing businesses to Visa for $75 million in cash. “With 30 years of experience pushing the envelope in semiconductor design, we look toward a future of continued innovation to carry on our mission of making data faster and safer,” Rambus President and CEO Luc Seraphin said in a statement. “Completing this transa... » read more

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