Developing Workflows To Streamline System-Level Design

By Ann Mutschler - 28 Aug, 2024 - Comments: 0

Experts At The Table: One of the big challenges facing EDA companies is explaining to customers what's possible, how to streamline their designs, and what can be accomplished at what level of risk. Semiconductor Engineering sat down to talk about how relationships are fundamentally changing between EDA companies and their customers Michal Siwinski, chief marketing officer at Arteris; Chris Muet... » read more

Focus Shifts To Application-Specific Workloads

By Ann Mutschler - 07 Aug, 2024 - Comments: 0

Experts At The Table: EDA has undergone numerous workflow changes over time. Different skill sets have come into play over the years, and at times this changed the definition of what it means to design at the system level. To work out what this means for designers today, and how it looks going forward, Semiconductor Engineering sat down with Michal Siwinski, chief marketing officer at Arteris; ... » read more

What’s Next In System-Level Design?

By Ann Mutschler - 25 Jul, 2024 - Comments: 0

Experts At The Table: EDA has undergone numerous workflow changes over time. Different skill sets have come into play over the years, and at times this changed the definition of what it means to design at the system level. Semiconductor Engineering sat down to discuss what this means for designers today, and what the impact will be in the future, with Michal Siwinski, chief marketing officer at... » read more

Where Are The Autonomous Cars?

By Marie C. Baca - 08 Aug, 2022 - Comments: 0

Are we there yet? Governments, consumers, and engineers alike want to know how close the automotive world is to producing a fully autonomous Level 5 vehicle. While some experts say such vehicles could hit the road in the next few years, they're a shrinking minority. Most forecasts say a truly self-driving car is at least a decade away — and maybe much longer, because it requires disruptive... » read more

Software Infrastructure For Silicon Lifecycle Management

By Siemens EDA - 12 Jul, 2022 - Comments: 0

Semiconductor technology continues to deliver higher levels of logic density in the era of nanometer processes. System-on-chip (SoC) teams can deliver even higher functionality when coupled with the massive integration possibilities of three-dimensional integrated circuit (3DIC) architectures. However, this growth must be matched by increases in capabilities and productivity in the collection a... » read more

Product Lifecycle Management For Semiconductors

By Brian Bailey - 23 Nov, 2021 - Comments: 1

Product lifecycle management (PLM) and the semiconductor industry have always been separate, but pressure is growing to integrate them. Automotive, IIoT, medical, and other industries see that as the only way to manage many aspects of their business, and as it stands, semiconductors are a large black box in that methodology. The technology space is driven by a mix of top down and bottom-up p... » read more

Structural Vs. Functional

By Brian Bailey - 23 Nov, 2021 - Comments: 0

When working on an article about PLM and semiconductors, I got to review a favorite topic from my days in EDA development – verification versus validation. I built extensive presentations around it and tried to persuade people within the EDA industry, as well as customers, about the advantages of doing a top-down functional modeling and analysis. The V diagram that everyone uses is flawed and... » read more

2020 CEO Outlook

By Ed Sperling - 25 Jun, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss the semiconductor industry's outlook and what's changing with Simon Segars, CEO of Arm; Joseph Sawicki, executive vice president of IC EDA at Mentor, a Siemens Business; Raik Brinkmann, CEO of OneSpin Solutions; Babak Taheri, CEO of Silvaco; John Kibarian, CEO of PDF Solutions; and Prakash Narain, CEO of Real Intent. The conversation was part of the... » read more

The Race For Better Computational Software

By Ed Sperling - 05 Sep, 2019 - Comments: 0

Anirudh Devgan, president of Cadence, sat down with Semiconductor Engineering to talk about computational software, why it's so critical at the edge and in AI systems, and where the big changes are across the semiconductor industry. What follows are excerpts of that conversation. SE: There is no consistent approach to how data will be processed at the edge, in part because there is no consis... » read more

Siemens-Mentor Deal Retrospective

By Ed Sperling - 21 Aug, 2019 - Comments: 1

Tony Hemmelgarn, president and CEO of Siemens PLM Software and CEO of Mentor, a Siemens Business, sat down with Semiconductor Engineering to talk about the acquisition of Mentor Graphics, the shift toward more customized design, and where AI fits into the design picture. SE: How does a company like Siemens see the EDA industry evolving? Hemmelgarn: Part of the reason we bought Mentor Grap... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?