Challenges In IC And Electronic Systems Verification


Power efficiency, unrealistic schedules, and cost-down considerations are increasingly the top challenges design teams must meet to deliver next generation electronic systems, whether it is for the mobile, server, or automotive market. In addition, a successful chip tapeout does not guarantee the eventual end-product’s success—there are many variables to take into account. In the first p... » read more

Managing Electrical Communications Better


By Ann Steffora Mutschler Managing the electrical components of signal paths between IC, package, board and system is no small task, and it’s only growing in complexity. Understanding how to correctly optimize the communications within a system is critical given that the I/O power is becoming a significant portion of the overall chip power as the number of bits and the speed at which t... » read more

The Double Whammy


By Ann Steffora Mutschler Given that at 40nm and below every [getkc id="81" kc_name="SoC"] has some mixed-signal content, combined with the fact that power awareness is top priority no matter what the target application is, design teams and verification engineers are grappling with tremendous challenges just to get a chip to yield. “For verification engineers and for designers, this is a ... » read more

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