New System Requirements Demand a Creatively Choreographed Ecosystem


In the past, integrated circuits, packages and boards were all designed independently, and yet in most cases still managed to fit together with very few functional or technical problems. However, recent advances in chip performance have changed this process dramatically. New designs, processes and materials already have been seen in packaging as high-performance semiconductor chips need to c... » read more

A Strategy For Designing For Power With FinFETs


Recently Qualcomm announced their new SnapDragon processor 820, which was designed using finFET technology. They showed some amazing results, such as 2X improvement in performance and 2X improvement in power compared to 28nm designs. Previously, when ARM announced their A72 processors in finFET, they too had claimed 3.5X improvement in power compared to 28nm designs. But can designers expect... » read more

Which Process, Material, IP?


For years chipmakers have been demanding more choices. They've finally gotten what they wished for—so many possibilities, in fact, that engineering teams of all types are having trouble wading through them. And to make matters worse, some choices now come with unexpected and often unwanted caveats. At the most advanced nodes it's a given that being able to shrink features and double patter... » read more

Tech Talk: USB Type-C


NXP's Ravi Shah explains how to design in the new USB standard, what to watch out for and why it's going to be so important for mobile and connected devices. [youtube vid=iPCwpaPy1pw] » read more

Technology Tsunami Approaches


How many times have we heard the saying that technology advancements are accelerating and that inevitably the older generation will have increasing problems keeping up with the new advancements? This happened to me with software development methodologies over fifteen years ago. I still program, when people actually let me, using basically the same techniques I learned when I was in my teens.... » read more

A Broad, Effective Approach to Optimizing for Power


As an industry we talk a lot about the challenges of power-aware design and accompanying issues at leading-edge nodes. There’s no denying some tough challenges, but if we’re honest, there are plenty of opportunities we can exploit right now to improve power in our designs. You’ve heard the saying, “death by a thousand cuts?” Well, when it comes to grappling with power in today’s ... » read more

Cloud 2.0


Corporate data centers are reluctant adopters of new technology. There is too much at stake to make quick changes, which accounts for a number of failed semiconductor startups over the past decade with better ideas for more efficient processors, not to mention rapid consolidation in other areas. But as the amount of data increases, and the cost of processing that data decreases at a slower rate... » read more

Thermal Interface Materials: The Unknown Entity?


Thermal interface materials (TIMs) are becoming more important in all application areas and between different component parts. Any semiconductor, ranging from LEDs to high-power electronics, is becoming smaller, yet producing more power. In many ways the physical design limits have been reached for packaging, allowing entire components to have a total thermal resistance of less than 0.1 K/W. Ho... » read more

The Old Two-Step Just Doesn’t Have That Swing


Power analysis has quickly become equally as important as functional verification for today's power-hungry SoCs. Yet, until now, it was not possible to fully analyze dynamic power in very large SoCs running embedded software. That day has finally arrived with new emulation platform software that overcomes the intrinsic shortcomings of the current two-step power estimation tools. The current ... » read more

How Hard Is FD-SOI Design?


Fully-depleted silicon-on-insulator ([getkc id="220" kc_name="FD-SOI"]) manufacturing technology reached of point of readiness for mass production at the end of March. Along with that, it’s now clear that while there are some impacts on the design flow, those impacts are not game changers. For one thing, the tools required are the same ones currently used for 28nm planar bulk CMOS. The onl... » read more

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