tag: power

Save Power And Area By Eliminating Redundant Resets
By Mohit Kumar - 12 May, 2016 - Comments: 1

Resets initialize hardware by forcing it into a known state, either on design start up or to recover from an error. In today’s SoC designs, it is not uncommon to see designs with millions of registers that have resets. Unfortunately, many of these resets are redundant. Leaving these unnecessary register resets in the design leads to increased power consumption, excess area, and routing conges... » read more

Is Low Power Coverage Achievable?
By Srikanth Jadcherla - 12 May, 2016 - Comments: 0

Back in 2005, yes, before the invention of the iPhone, I made a slide to educate users on what to cover in Low Power Verification. Using a simple 3 island test case, I illustrated that verification had to be done in 4 states of operation, with 8 transitions and 16 sequences to be verified. This is after pruning the theoretically possible set of 8 states for on/off voltage islands. More than ... » read more

Evolving LTE Brings New Era Of Connectivity To IoT
By David Maidment - 12 May, 2016 - Comments: 0

The Internet of Things is here and ramping deployment today, but there’s still considerable work underway to optimize many aspects of the network. Not the least of this are the access technologies that exist or are emerging to enable the ‘last mile’ connectivity for IoT connected objects. Wireless access broadly fits into two main areas: licensed band and unlicensed band. Short-range unli... » read more

Three Common SoC Power Management Myths
By Drew Wingard - 12 May, 2016 - Comments: 0

SoCs are power-sensitive. Sometimes SoCs are sensitive because designers worry about the impact they have on the end product battery life. Sometimes designers worry about the effects of dissipating too much power on packaging and thermal issues. Sometimes designers are simply worried about the massive cooling budgets of data centers generating heat from thousands of their chips running in serve... » read more

2.5D Becomes A Reality
By Ed Sperling - 14 Apr, 2016 - Comments: 2

Semiconductor Engineering sat down to discuss 2.5D and advanced packaging with Max Min, senior technical manager at [getentity id="22865" e_name="Samsung"]; Rob Aitken, an [getentity id="22186" comment="ARM"] fellow; John Shin, vice president at [getentity id="22903" e_name="Marvell"]; Bill Isaacson, director of ASIC marketing at [getentity id="22242" e_name="eSilicon"]; Frank Ferro, senior di... » read more

An Introduction To Reducing Dynamic Power
By Ellie Burns - 14 Apr, 2016 - Comments: 0

In the past few blogs we have been primarily talking about UPF and applying the Successive Refinement process to save power. But, this process addresses leakage power. In this session we want to talk about how to save dynamic power. As designs move to finFET technology, dynamic power is the dominant contributor to power consumption. Power consumption trend. I recently sat down with my c... » read more

Bluetooth Smart: Doing (A Lot) More With Less
By Charles Dittmer - 14 Apr, 2016 - Comments: 0

By Charles Dittmer and Prithi Ramakrishnan I was really struck by Ann Steffora Mutschler's piece last month (Running Out Of Energy?). She notes that by 2040, the energy required for computing is expected to surpass the estimated world's energy production. That's a problem. One factor could be the rise of IoT applications. Billions of devices will be deployed in the next decade, and we ... » read more

Verification Facing Unique Inflection Point
By Brian Bailey - 10 Mar, 2016 - Comments: 0

The Design and Verification Conference and Exhibition (DVCon) attracted more than 1,100 people to San Jose last week, just slightly less than last year. While a lot of focus, and most of the glory, goes to design within semiconductor companies, it is verification where most of the advancements are happening and thus the bigger focus for DVCon. The rate of change in verification and the producti... » read more

Techno-Morality Is Our Concern
By Brian Bailey - 25 Feb, 2016 - Comments: 0

A decade or so ago, [getentity id="22035" e_name="Synopsys"] Chairman of the Board and co-CEO [getperson id="11034" comment="Aart de Geus"] gave a bunch of talks about the importance of Techonomics. Fundamentally this was about the merging of technology and business economics. De Geus saw that we were entering a period of connected everything, and that devices increasingly would be driven by in... » read more

Working With FinFETs
By Binu Abraham - 11 Feb, 2016 - Comments: 0

One of the key technology trends driving semi-conductor industry is the adoption of finFET processes. As opposed to a traditional planar transistor, the finFET has an elevated channel or “fin,” which the gate wraps around. Due to their structure, finFETs generate much lower leakage power and allow greater device density. Compared to planar transistors, finFET operate at a lower voltage and ... » read more

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