Rethinking Power


Power typically has been the last factor to be considered in the PPA equation, and it usually was somebody else's problem. Increasingly it's everyone's problem, and EDA companies are beginning to look at power differently than in the past. While the driving forces vary by market and by process node, the need to save energy at every node and in almost all designs is pervasive. In the server m... » read more

Is The IoT Safe To Use?


By Ernest Worthman & Ed Sperling Data security has been a problem since well before the invention the computer, and it has been getting progressively more difficult to contain every year for the past eight decades. It was made much worse when computing was decentralized with the introduction of the IBM PC in 1981, made worse again when networking was introduced into corporations by Novell'... » read more

One-On-One: Dark Silicon


Professor Michael Taylor’s research group at UC San Diego is studying ways to exploit dark silicon to optimize circuit designs for energy efficiency. He spoke with Semiconductor Engineering about the post-Dennard scaling regime, energy efficiency from integrated circuits all the way up to data centers, and how the manufacturing side can help. What follows are excerpts of that conversation. (F... » read more

The Interconnected Web Of Power


Tradeoffs between area and timing used to follow fairly simple rules. You could improve timing by adding area, and occasionally find an architectural solution that would decrease both at the same time. With physical synthesis the relationship became a little more complicated because an increase in area, say to make a drive larger or add another buffer, might upset the layout. That, in turn, cou... » read more

Reality Check: A Guide To Understanding Optimized Processor Cores


The performance of the processor core in an SoC is often a key product differentiator. It's not just about performance though - power and cost are equally important considerations. In today's markets, SoC developers have to hit aggressive power, performance and area goals to remain competitive. This white paper discusses the many interacting parameters that determine the optimum implementation ... » read more

Getting The Right Return On Invested Power Consumption


Three weeks ago, I participated in a panel on low power and modeling at the system level. It took place at DesignCon 2015 in Santa Clara, together with representatives from AMD, Avago, and Qualcomm. Interestingly enough, it gave me the opportunity to set some of the myths and dis-information about power consumption in emulation straight, but more on that later. The panel was moderated by Steve ... » read more

Executive Insight: Frankwell Lin


Semiconductor Engineering sat down with Frankwell Lin, president and co-founder of [getentity id="22866" e_name="Andes Technology"], to talk about the IoT, what's required in devices and what will likely change over the next few years. What follows are excerpts of that conversation. SE: What are the big market opportunities in the Asia/Pacific region? Lin: The big market is the [getkc id=... » read more

With Responsibility Comes Power


The debate continues as to whether [getkc id="106" kc_name="power"] has risen to become a primary design consideration, or if it remains secondary to functionality and performance. What is indisputable is the rise in the importance of both power and energy conservation. As technology improves, additional aspects of the design flow are being affected. With that, the focus for power reduction is ... » read more

Signal Integrity Issues


Semiconductor Engineering sat down to discuss signal integrity with Rob Aitken, research fellow at [getentity id="22186" comment="ARM"]; PV Srinivas, senior director of engineering for the Place & Route Division of [getentity id="22017" e_name="Mentor Graphics"]; and Bernard Murphy, chief technology officer at [getentity id="22026" e_name="Atrenta"]. What follows are excerpts of that conver... » read more

Power Is Now Every Engineer’s Concern


Every semiconductor engineer by this point recognizes the need to reduce power inside of SoCs and software. What they don't always see, though, is the chain of events those efforts are beginning to set off—unpredictable, difficult to model, and altogether more difficult to contain. There is no doubt that more functionality on mobile devices requires new ways of designing SoCs, including re... » read more

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