Optimizing IP For Power


By Ed Sperling As the amount of commercial IP in an SoC increases, the entire bill of materials is coming under increasing scrutiny because of a new concern—power. Commercial IP, after all, is largely a collection of black-box solutions to speed up the time it takes to bring a chip to market, and frequently to improve the quality, but the cumulative impact on the system power budget has neve... » read more

Experts At The Table: FinFET Questions And Issues


By Ed Sperling Low-Power/High-Performance Engineering sat down to discuss the current state and future promise of finFETs, and the myriad challenges, with Ruggero Castagnetti, an LSI fellow; Barry Pangrle, senior power methodology engineer at Nvidia; Steve Carlson, group director of marketing at Cadence; and Mary Ann White, director of product marketing at Synopsys. What follows are excerpts ... » read more

Guesswork, And Other Design Paradigms


PPA for soft IP seems like an oxymoron. How do you determine the implementation characteristics (PPA — Power, Performance and Area) for something that has not yet been implemented? Flying blind until implementation would be a rookie move. More likely you are going to estimate based on a prior implementation. Not a bad approach if the IP hasn’t changed significantly and the target library is... » read more

Wafer Leaders Extend Basis for Global SOI Supply


Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News ~  ~ It’s a bright green light from the world leaders in SOI wafer capacity. Soitec, the world leader in SOI wafer production, and long-time partner Shin-Etsu Handatai (SEH), the world’s biggest producer of silicon wafers, have extended their licensing agreement and expanded their technology cooperation. SEH is a $12... » read more

SPOTLIGHT ON FD-SOI, FINFETS AT IEEE SOI CONFERENCE
;1-4 OCT, NAPA


The 38th annual SOI Conference is coming right up. Sponsored by IEEE Electron Devices Society, this is the only dedicated SOI conference covering the full technology chain from materials to devices, circuits and system applications. Chaired this year by Gosia Jurczak (manager of the Memories Program at imec), this excellent conference is well worth attending. It’s where the giants of the ... » read more

Motorcycle Diaries


By Jon McDonald I recently had reason to add another vehicle to my household. My son is starting to drive, so he's taking my car. Instead of another car I decided to get a motorcycle. I have had a couple, but it's been a few years. After much browsing I decided on a Ducati, I picked it up a few weeks ago. It has an impressive number of user adjustable electronic controls, everything from AB... » read more

New Challenges, New Name


As you’ll notice today, we’ve changed our name from Low Power Engineering to Low-Power/High-Performance Engineering. We don’t take name changes lightly—we've been discussing this in depth with readers, sponsors, and researchers for the past six months. The almost universal conclusion is there is a big shift underway in the semiconductor industry today, and our new logo is a better refle... » read more

Low Power Everywhere


By Kiran Vittal School is over for my kids and the summer holidays are here. We are planning to make minor modifications to our home, which includes installation of recessed lights. LED light bulbs are all over the place in home appliance stores and they claim 85% savings in energy costs with a life span of 50,000 hours. The cost of these LED bulbs is five to six times the cost of your average... » read more

Picking The Right Processor


By Frank Schirrmeister In an embedded system, the sole connection point between the software and the hardware is the processor. Somewhere right now the effort to develop software for a complex System-on-Chip (SoC) is surpassing the effort of developing the chip itself. As I pointed out in my recent description of the Design West conference in San Jose, complex ecosystems of related content, to... » read more

Consortium Results (Part 3 of 3): 20nm FDSOI Comes Out Way Ahead


The results of the most recent SOI Consortium benchmarking study detail the interest of planar FD-SOI as early as the 28nm and 20nm technology nodes, in terms of performance, power and manufacturability. This 3-part blog series looks further at some of the implications. ~~ The SOI Industry Consortium announcement at the end of the year provided silicon proof that FD-SOI handily bea... » read more

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