tag: power

Accelerating Adoption of SiC Power
By Wolfspeed, a Cree Company - 20 Mar, 2019 - Comments: 0

The market has heard for many years about wide bandgap product roadmaps and concepts, touting that many possibilities could be available. However, you can’t design in a PowerPoint presentation or a preliminary datasheet, so this article will reinforce that Wolfspeed SiC power has moved way beyond any hype, talk, and fake news and has pioneered the widespread adoption of silicon carbide power ... » read more

Power Budgets At 3nm And Beyond
By Ed Sperling - 14 Mar, 2019 - Comments: 0

There is high confidence that digital logic will continue to shrink at least to 3nm, and possibly down to 1.5nm. Each of those will require significant changes in how design teams approach power. This is somewhat evolutionary for most chipmakers. Five years ago there were fewer than a handful of power experts in most large organizations. Today, everyone deals with power in one way or another... » read more

Using Less Power At The Same Node
By Brian Bailey - 14 Mar, 2019 - Comments: 0

Going to the next node has been the most effective way to reduce power, but that is no longer true or desirable for a growing percentage of the semiconductor industry. So the big question now is how to reduce power while maintaining the same node size. After understanding how the power is used, both chip designers and fabs have techniques available to reduce power consumption. Fabs are makin... » read more

Gearing Up For 5G
By Brian Bailey - 14 Feb, 2019 - Comments: 0

5G has been touted as the new enabler for many market segments, including mobile phones, automotive, virtual reality, and IoT. But there are many questions and much speculation about when and how this new wireless standard will impact different market segments and what effect it will have on semiconductor design. With a promise of orders of magnitude improvement in communication speed an... » read more

Pushing AI Into The Mainstream
By Brian Bailey - 31 Jan, 2019 - Comments: 0

Artificial intelligence is emerging as the driving force behind many advancements in technology, even though the industry has merely scratched the surface of what may be possible. But how deeply AI penetrates different market segments and technologies, and how quickly it pushes into the mainstream, depend on a variety of issues that still must be resolved. In addition to a plethora of techni... » read more

The Cost Of Accuracy
By Brian Bailey - 13 Dec, 2018 - Comments: 0

How accurate does a system need to be, and what are you willing to pay for that accuracy? There are many sources of inaccuracy throughout the development flow of electronic systems, most of which involve complex tradeoffs. Inaccuracy leaves an impact on your design in ways you are not even aware of, hidden by best practices or guard-banding. EDA tools also inject some inaccuracy. As the i... » read more

Fusion Compiler: Comprehensive RTL-to-GDSII Implementation System
By Synopsys - 07 Nov, 2018 - Comments: 0

The semiconductor industry is going through a renaissance period with waves of technological advancements and innovation. There has been a significant uptick in demand for silicon in recent years, driven by market sectors including automotive, artificial intelligence, cloud computing, and internet of things (IoT) that have their own unique mix of design and implementation requirements. The mobi... » read more

Overcoming Low Power Verification Challenges For Mixed-Signal SoC Designs
By Himanshu Bhatt - 11 Oct, 2018 - Comments: 0

With increasing SoC complexity and advanced power-aware architectures, a robust low power verification methodology is important for signing off the design at different stages from RTL through netlist. For mixed-signal SoCs, the challenge is, there is no well-defined low power methodology, nor are the industry’s low power verification tools equipped to handle custom designs. This article propo... » read more

Using ASICs For AI Inferencing
By Ed Sperling - 10 Oct, 2018 - Comments: 0

Flex Logix’s Cheng Wang looks at why ASICs are the best way to improve performance and optimize power and area for inferencing, and how to add flexibility into those designs to deal with constantly changing algorithms and data sets. https://youtu.be/XMHr7sz9JWQ » read more

eFPGA vs. FPGA Design Methodologies
By Ed Sperling - 05 Oct, 2018 - Comments: 0

Namit Varma, senior director of Achronix’s India Technology Center, discusses the differences between discrete and embedded FPGAs. https://youtu.be/Vwo3ktQvcKc » read more

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