tag: PVT monitoring

Reimagining PVT Monitoring IP For Advanced Node GAA Process
By Rohan Bhatnagar - 09 Apr, 2024 - Comments: 0

As process technology continues to evolve, so must design tools and the IP that support them. One example of an industry evolution is on the PVT monitoring IP side. The process, voltage, and temperature (PVT) monitors embedded within chips provide feedback on silicon status at every stage of the lifecycle, including mission use in the field. The data gathered from the monitors enables benefits ... » read more

SLM Analytics Of In-Chip Monitor Data Unlock Greater Productivity And Cost Savings
By Guy Cortez - 09 Jan, 2024 - Comments: 0

When it comes to measuring key operational metrics such as power and performance of your silicon, in-chip monitors have been the longstanding cornerstone for providing such valuable measurements and insights. Data captured from these monitors – process monitors configured in the form of ring oscillator chains being the most common – can tell you if your chip is meeting the requisite power o... » read more

Automotive Safety Requires PVT Monitoring IP Within Semiconductor ICs
By Rohan Bhatnagar - 12 Sep, 2023 - Comments: 0

The modern automobile, especially with the move toward more electrification, presents huge challenges to the designers of vehicular electronics. Gone are the days of mechanical issues and oil changes being primary concerns. Today’s automobile has a high number of semiconductor chips performing functions for self-driving autonomous systems, advanced driver assistance systems (ADAS), connectivi... » read more

The Ever-Increasing Role Of PVT Monitor IP And Its Significance In Silicon Lifecycle Management
By Rohan Bhatnagar - 05 Jun, 2023 - Comments: 0

The demand for semiconductor chips has grown exponentially over the years, driven by advancements in technologies such as artificial intelligence, the internet of things, 5G, automotive and cloud. With this increased demand, there is a growing need for more reliable semiconductor chips that can operate under extreme conditions and withstand the rigors of modern applications. Here are some of th... » read more

Enabling SoC Visibility For Future Secure Hardware Architectures With In-Chip Environmental Monitoring
By Ramsay Allen - 07 Jun, 2022 - Comments: 0

Billions of people around the world are now online and generating vast amounts of data every day. This data revolution, which is largely driven by user performance requirements, is a double-edged sword. On one hand it is enabling huge technology advancements, revolutionizing the way we connect with each other and the world around us, but on the other hand it is exposing major vulnerabilities in... » read more

Completing The Silicon Lifecycle Management Puzzle
By Stephen Crosher - 08 Dec, 2020 - Comments: 0

The year 2020 will be remembered for many reasons. The global pandemic, the political struggles and the extreme weather will occupy our thoughts for many years. There was another event that occurred in 2020 that will also be remembered in a smaller, but very important portion of the world. It’s the year that Synopsys acquired Moortec to complete the silicon lifecycle management (SLM) puzzle. ... » read more

“See No Evil” Shouldn’t Apply To SoC Design
By Tim Penhale-Jones - 11 Jun, 2020 - Comments: 0

In the first part of this blog series, Talking Sense with Moortec…’Are you listening’, I looked at not waiting for hindsight to be wise after the event, instead make use of what’s available and act ahead of time. There’s a Japanese maxim, depicting three ‘wise’ monkeys… Kikazaru, Mizaru, and Iwazaru, better known as ‘hear no evil, see no evil and speak no evil’. If they we... » read more

In-Chip Monitoring Becoming Essential Below 10nm
By Ann Mutschler - 20 May, 2019 - Comments: 0

Rising systemic complexity and more potential interactions in heterogeneous designs is making it much more difficult to ensure a chip, or even a block within a chip, will functioning properly without actually monitoring that behavior in real-time. Continuous and sporadic monitoring have been creeping into designs for the past couple of decades. But it hasn’t always been clear how effective... » read more

Explaining Adaptive Voltage Scaling And Dynamic Voltage Frequency Scaling
By Ramsay Allen - 17 Jul, 2018 - Comments: 0

A Q&A with Moortec CTO Oliver King. What exactly do we mean by Adaptive Voltage Scaling versus Dynamic Voltage Frequency Scaling? Adaptive Voltage Scaling (AVS) involves the reduction of power by changing the operating conditions within an ASIC in a closed loop. Dynamic Voltage Frequency Scaling (DVFS), on the other hand, is a power management technique where the voltage is increased ... » read more

Supply Monitoring On 28nm & FinFET: The Challenges Posed
By Ramsay Allen - 12 Apr, 2018 - Comments: 0

A Q&A with Moortec CTO Oliver King. What are the issues with supplies on advanced nodes? The supplies have been coming down, quicker than the threshold voltages which has led to less supply margin. In addition to this, the interconnects are becoming thinner and closer together, which is pushing up resistance and also capacitance. What is the effect of these issues? In short, it... » read more

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