tag: reliability

Reliability Of eWLB For Automotive Radar Applications
By STATS ChipPAC - 09 Oct, 2017 - Comments: 0

With shrinking of chip sizes, Wafer Level Chip Scale Packaging (WLCSP) becomes an attractive and holistic packaging solutions with various advantages in comparison to conventional packages, such as Ball Grid Array (BGA) with flipchip or wirebonding. With the advancement of various fan-out (FO) WLPs, it has been proven to be a more optimal, low cost, integrated and reliable solution compared to ... » read more

Addressing Thermal Reliability In Next-Gen FinFET Designs
By Anusha Prakash - 18 Sep, 2017 - Comments: 0

The next generation of chips on the 10/7nm finFET processes will be able to cram more devices into same area while also boosting performance, but there's a price to pay for that. The 3D fin structures trap heat, so the the temperature rises on the device and there is no way to dissipate that heat. This combination of higher current density, higher performance and higher temperature has a det... » read more

Tech Talk: 7nm Thermal Effects
By Ed Sperling - 14 Sep, 2017 - Comments: 0

ANSYS' Karthik Srinivasan talks about the effect of heat on reliability at advanced process nodes, including self-heating, circuit aging, and how that will affect automotive electronics. https://youtu.be/SS6iAXp0Kn8   Related Tech Talk: 7nm Power Dealing with thermal effects, electromigration and other issues at the most advanced nodes. » read more

How To Make Autonomous Vehicles Reliable
By Ann Mutschler - 11 Sep, 2017 - Comments: 1

The number of unknowns in automotive chips, subsystems and entire vehicles is growing as higher levels of driver assistance are deployed, sparking new concerns and approaches about how to improve reliability of these systems. Advanced Driver Assistance Systems (ADAS) will need to detect objects, animals and people, and they will be used for parking assistance, night vision and collision avoi... » read more

How Reliable Are FinFETs?
By Ann Mutschler - 16 Aug, 2017 - Comments: 1

Stringent safety requirements in the automotive and industrial sectors are forcing chipmakers to re-examine a number of factors that can impact reliability over the lifespan of a device. Many of these concerns are not new. Electrical overstress (EOS), electrostatic discharge (ESD) and [getkc id="160" kc_name="electromigration"] (EM) are well understood, and have been addressed by EDA tools f... » read more

The Rising Value Of Data
By Ed Sperling - 09 Aug, 2017 - Comments: 0

The volume of data being generated by a spectrum of devices continues to skyrocket. Now the question is what can be done with that data. By Cisco's estimates, traffic on the Internet will be 3.3 zetabytes per year by 2021, up from 1.2 zetabytes in 2016. And if that isn't enough, the flow of data isn't consistent. Traffic on the busiest 60-minute period in a day increased 51% in 2016, compare... » read more

Who’s Responsible For Transistor Aging Models?
By Ann Mutschler - 13 Jul, 2017 - Comments: 0

While there are a number of ways to go about reliability and transistor aging analysis, it is all in large part dependent on fabs and foundries to provide the aging models. The situation is also not entirely clear in the semiconductor ecosystem because the classic over-the-wall mentality between design and manufacturing still exists. And unfortunately this wall is bi-directional. Not only... » read more

Transistor Aging Intensifies At 10/7nm And Below
By Ann Mutschler - 13 Jul, 2017 - Comments: 0

Transistor aging and reliability are becoming much more troublesome for design teams at 10nm and below. Concepts like ‘infant mortality’ and 'bathtub curves' are not new to semiconductor design, but they largely dropped out of sight as methodologies and EDA tools improved. To get past infant mortality, a burn-in process would be done, particularly for memories. And for reliability, which... » read more

Chip Test Shifts Left
By Jeff Dorsch - 07 Jun, 2017 - Comments: 0

“Shift left” is a term traditionally applied to software testing, meaning to take action earlier in the V-shaped time line of a project. It has recently been touted in electronic design automation and IC design, verification, and test. “Test early and test often” is the classic maxim of software testing. What if that concept could also be implemented in semiconductor testing, to redu... » read more

Focus Shifts To System Quality
By Ed Sperling - 05 Jun, 2017 - Comments: 0

For the past decade, many semiconductor industry insiders predicted that software would take over the world and hardware would become commoditized. The pendulum seems to have stopped, and if anything, it is reversing course. Initial predictions were based on several advantages for software. First, software is easier to modify and patch. Second, universities turn out far more software develop... » read more

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