tag: RWTH Aachen University

Research Bits: May 16
By Jesse Allen - 16 May, 2023 - Comments: 0

Germanium-tin transistor Scientists at Forschungszentrum Jülich, CEA-Leti, University of Leeds, Leibniz Institute for High Performance Microelectronics, and RWTH Aachen University fabricated a new type of transistor from a germanium-tin alloy. Charge carriers can move faster in the material than in silicon or germanium, which enables lower voltages in operation. “The germanium–tin syst... » read more

Chip Industry’s Technical Paper Roundup: May 8
By Linda Christensen - 08 May, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=102 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us... » read more

Hexagonal Boron Nitride Memristors With Nickel Electrodes: Current Conduction Mechanisms & Resistive Switching Behavior (RWTH Aachen)
By Technical Paper Link - 06 May, 2023 - Comments: 0

A new technical paper titled "Resistive Switching and Current Conduction Mechanisms in Hexagonal Boron Nitride Threshold Memristors with Nickel Electrodes" was published by researchers at RWTH Aachen University and Peter Gruenberg Institute. Abstract: "The 2D insulating material hexagonal boron nitride (h-BN) has attracted much attention as the active medium in memristive devices due to i... » read more

Chip Industry’s Technical Paper Roundup: May 2
By Linda Christensen - 02 May, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=95 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

Information flow policies for NVM Technologies
By Technical Paper Link - 26 Apr, 2023 - Comments: 0

A new technical paper titled "Automated Information Flow Analysis for Integrated Computing-in-Memory Modules" was published by researchers at RWTH Aachen University. Abstract: "Novel non-volatile memory (NVM) technologies offer high-speed and high-density data storage. In addition, they overcome the von Neumann bottleneck by enabling computing-in-memory (CIM). Various computer architectures... » read more

Chip Industry’s Technical Paper Roundup: Apr. 25
By Linda Christensen - 25 Apr, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=94 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us ... » read more

Optimizing The Growth And Transfer Process of Graphene (Cambridge, RWTH Aachen)
By Technical Paper Link - 21 Apr, 2023 - Comments: 0

A technical paper titled "Putting High-Index Cu on the Map for High-Yield, Dry-Transferred CVD Graphene" was published by researchers at University of Cambridge, RWTH Aachen University, and National Institute for Materials Science. Abstract: "Reliable, clean transfer and interfacing of 2D material layers are technologically as important as their growth. Bringing both together remains a ch... » read more

Chip Industry’s Technical Paper Roundup: Apr. 18
By Linda Christensen - 18 Apr, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=93 /]   If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involv... » read more

Vertical Nanowire Gate-All-Around FETs based on the GeSn-Material System Grown on Si
By Technical Paper Link - 10 Apr, 2023 - Comments: 0

A new technical paper titled "Vertical GeSn nanowire MOSFETs for CMOS beyond silicon" was published by researchers at Peter Grünberg Institute 9, JARA, RWTH Aachen University, CEA, LETI, University of Grenoble Alpes, University of Leeds, and IHP. "Here, we present high performance, vertical nanowire gate-all-around FETs based on the GeSn-material system grown on Si. While the p-FET transcon... » read more

Looking Forward To SPIE, And Beyond
By Katherine Derbyshire - 16 Feb, 2023 - Comments: 0

On the eve of this year’s SPIE Advanced Lithography + Patterning conference, I took a look at the IEEE Devices and Systems Roadmap’s lithography section. It’s especially notable for the emergence of EUV lithography, which has quickly become critical for advanced logic. High-NA tools to support still smaller dimensions are on the horizon. In the near-term, though, the key challenge is not ... » read more

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