EDA Gears Up For 3D


Semiconductor Engineering sat down to discuss changes required throughout the ecosystem to support three-dimensional (3D) chip design with Norman Chang, chief technologist for the Semiconductor Business Unit of ANSYS; John Park, product management director for IC packaging and cross-platform solutions at Cadence; John Ferguson, director of marketing for DRC applications at Mentor, a Siemens Bus... » read more

Week In Review: Manufacturing, Test


AI chip boom or bust? The semiconductor industry is the most bullish about adopting artificial intelligence (AI), according to a new report from Accenture. Some 77% of semiconductor executives surveyed said they have adopted AI within their businesses or are piloting the technology. In addition, 63% of semiconductor executives expect that AI will have the greatest impact on their business over... » read more

Week In Review: Manufacturing, Test


Chipmakers In its latest move to cut costs and focus on its core business, GlobalFoundries (GF) has announced plans to jettison its U.S. photomask operations in Burlington, Vt., but the foundry vendor will maintain a stake in its joint venture mask unit. Under the plan, Toppan Photomasks will acquire certain assets of GF’s Burlington photomask facility. “GF is transferring its mask tool... » read more

Outlook For Masks, Materials and Wafers


After a slowdown in the first half of 2019, chipmakers and equipment vendors face a cloudy outlook for the second half of this year, with a possible recovery in 2020. But what about other key technologies like materials, photomasks and silicon wafers? These are also critical for the semiconductor supply chain and are key indicators where the market is heading. In the first half of 2019, m... » read more

GaN Versus Silicon For 5G


The global race to launch 5G mmWave frequencies could provide a long-anticipated market opportunity for gallium nitride (GaN) as an alternative to silicon. GaN is more power-efficient than silicon for 5G RF. In fact, GaN has been the heir apparent to silicon in 5G power amplifiers for years, especially when it comes to mmWave 5G networks. What makes it so attractive is its ability to efficie... » read more

Wanted: More Fab Tool Part Standards


As chipmakers ramp up the next wave of processes and grapple with how to reduce defect levels, they are encountering problems from an unlikely source—components inside of the fab equipment. Defects are unwanted deviations in chips, which impact yields and device performance. Typically, they are caused by an unforeseen glitch during the process flow. But a lesser-known problem involves defe... » read more

Week In Review: Manufacturing, Test


Fab tools Lam Research has rolled out two new tools for use in the production of 3D NAND. The first tool, called the VECTOR DT, is geared for backside deposition. The second system, the EOS GS, is a wet etch tool for film removal on backside and bevel. Designed to control the wafer bow in 3D NAND manufacturing, the VECTOR DT system is the latest addition to Lam’s plasma-enhanced chemical ... » read more

HBM2E: The E Stands for Evolutionary


Samsung introduced the first memory products in March that conform to JEDEC’s HBM2E specification, but so far nothing has come to market—a reflection of just how difficult it is to manufacture this memory in volume. Samsung’s new HBM2E (sold under the Flashbolt brand name, versus the older Aquabolt and Flarebolt brands), offers 33% better performance over HBM2 thanks to doubling the de... » read more

Week In Review: Manufacturing, Test


Trade wars Talks between the United States and China continue to stall and the two nations are still embroiled in a trade war. So this week, U.S. President Donald Trump would like to impose a 10% tariff on the remaining $300 billion list of China-based imports starting Sept. 1, according to a report from Reuters. This in turn will impact the electronics and IC industries. In response to the... » read more

Hybrid Emulation Takes Center Stage


From mobile to networking to AI applications, system complexity shows no sign of slowing. These designs, which may contain multiple billion gates, must be validated, verified and tested, and it’s no longer possible to just throw the whole thing in a hardware emulator. For some time, emulation, FPGA-based prototyping, and virtual environments such as simulators have given design and verific... » read more

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