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Metrology Of Thin Resist For High NA EUVL


One of the many constrains of high numerical aperture extreme ultraviolet lithography (High NA EUVL) is related to resist thickness. In fact, one of the consequences of moving from current 0.33NA to 0.55NA (high NA) is the depth of focus (DOF) reduction. In addition, as the resist feature lines shrink down to 8nm half pitch, it is essential to limit the aspect ratio to avoid pattern collapse. T... » read more

Hunting For Macro Defects: The Importance Of Bare Wafer Inspection


As logic and memory semiconductor devices approach the limits of Moore’s Law, the requirements for accuracy in layer transfer become increasingly stringent. One leading silicon wafer manufacturer estimates that 50% of epitaxial wafer supply for logic will be on nodes equal to or less than 7nm. This is up approximately 30% from earlier in the decade. To meet the demands of extreme ultraviol... » read more

How Overlay Keeps Pace With EUV Patterning


Overlay metrology tools improve accuracy while delivering acceptable throughput, addressing competing requirements in increasingly complex devices. In a race that never ends, on-product overlay tolerances for leading-edge devices are shrinking rapidly. They are in the single-digit nanometer range for the 3nm generation (22nm metal pitch) devices. New overlay targets, machine learning, and im... » read more

Metrology Challenges For Gate-All-Around


Metrology is proving to be a major challenge for those foundries working on processes for gate-all-around FETs at 3nm and beyond. Metrology is the art of measuring and characterizing structures in devices. Measuring and characterizing structures in devices has become more difficult and expensive at each new node, and the introduction of new types of transistors is making this even harder. Ev... » read more

How And Where ML Is Being Used In IC Manufacturing


Semiconductor Engineering sat down to discuss the issues and challenges with machine learning in semiconductor manufacturing with Kurt Ronse, director of the advanced lithography program at Imec; Yudong Hao, senior director of marketing at Onto Innovation; Romain Roux, data scientist at Mycronic; and Aki Fujimura, chief executive of D2S. What follows are excerpts of that conversation. Part one ... » read more

Clean Focus, Dose And CD Metrology For CD Uniformity Improvement


Authors: Honggoo Leea, Sangjun Hana, Minhyung Honga, Seungyong Kima, Jieun Leea, DongYoung Leea, Eungryong Oha, Ahlin Choia, Nakyoon Kimb, John C. Robinsonc, Markus Mengelc, Pablo Rovirac, Sungchul Yooc, Raphael Getinc, Dongsub Choib, Sanghuck Jeonb aSK Hynix, 2091, Gyeongchung-daero, Bubal-eub, Icheon-si, Gyeonggi-do, 467-701, Korea bKLA-Tencor Korea, Starplaza bldg., 53 Metapolis-ro, Hwasung... » read more

Improved Accuracy And Robustness For Advanced DRAM With Tunable Multi-Wavelength Imaging Scatterometry Overlay Metrology


By Honggoo Lee, Sangjun Han, Minhyung Hong, Jieun Lee, Dongyoung Lee, Ahlin Choi and Chanha Park of SK Hynix, and Dohwa Lee, Seongjae Lee, Jungtae Lee, Jeongpyo Lee, DongSub Choi, Sanghuck Jeon, Zephyr Liu, Hao Mei, Tal Marciano, Eitan Hajaj, Lilach Saltoun, Dana Klein, Eran Amit, Anna Golotsvan, Wayne Zhou, Eitan Herzl, Roie Volkovich and John C. Robinson of KLA. Abstract Overlay process c... » read more

3D NAND Metrology Challenges Growing


3D NAND vendors face several challenges to scale their devices to the next level, but one manufacturing technology stands out as much more difficult at each turn—metrology. Metrology, the art of measuring and characterizing structures, is used to pinpoint problems and ensure yields for all chip types. In the case of 3D NAND, the metrology tools are becoming more expensive at each iteration... » read more

Matching Between Simulations and Measurements As a Key Driver for Reliable Overlay Target Design


By S. Lozenko, B. Schulz, L. Fuerst, C. Hartig, and M. Ruhm of GlobalFoundries and T. Shapoval, G. Ben-Dov, Z. Lindenfeld,  R. Haupt, and R. Wang of KLA-Tencor Abstract Numerical simulation of overlay metrology targets has become a de-facto standard in advanced technology nodes. While appropriate simulation software is widely available in the industry alongside with metrics that allow sel... » read more

In-Cell Overlay Metrology By Using Optical Metrology Tool


By Honggoo Lee, Sangjun Han, Minhyung Hong, Seungyong Kima, Jieun Lee, DongYoung Leea, Eungryong Oh, and Ahlin Choi of SK Hynix, and Hyowon Park, Waley Liang, DongSub Choi, Nakyoon Kim, Jeongpyo Lee, Stilian Pandev, Sanghuck Jeon, John C. Robinson of KLA-Tencor Abstract Overlay is one of the most critical process control steps of semiconductor manufacturing technology. A typical advanced s... » read more

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