Making Adaptive Test Work Better


One of the big challenges for IC test is making sense of mountains of data, a direct result of more features being packed onto a single die, or multiple chiplets being assembled into an advanced package. Collecting all that data through various agents and building models on the tester no longer makes sense for a couple reasons — there is too much data, and there are multiple customers using t... » read more

TSMC Uncorks A16 With Super Power Rail


TSMC showed off its forthcoming A16 process technology node, targeted for the second half of 2026, at its 30th North American Technology Symposium this week. As the foundry moves from nanometer to angstrom process numbering, the new nodes will be prefixed with an “A” designation (instead of “N”) and A16 is the first for TSMC. TSMC said that N2 is still tracking to a 2025 production s... » read more

Deep Learning (DL) Applications In Photomask To Wafer Semiconductor Manufacturing


How Advantest Corporation, ASML, Fraunhofer, imec, Siemens EDA and others are using deep learning in semiconductor manufacturing. Click here to read more. » read more

Navigating Design Challenges


Explore the future of IC design with the Calibre Shift left initiative. In this paper, author David Abercrombie reveals how Siemens is changing the game for block/chip design-stage verification by moving Calibre verification and reliability analysis solutions further left in the design flow, including directly inside your P&R tool cockpit. Discover how you can reduce traditional long-loop v... » read more

Environmental Impact of Semiconductor Manufacturing (ORNL)


A  technical paper titled "Cleaner Chips: Decarbonization in Semiconductor Manufacturing" was published by researchers at Oak Ridge National Laboratory (ORNL) / UT-Battelle. Abstract: "The growth of the information and communication technology sector has vastly accelerated in recent decades because of advancements in digitalization and Artificial Intelligence (AI). Scope 1, 2, and 3 gree... » read more

AI/ML Challenges In Test and Metrology


The integration of artificial intelligence and machine learning (AI/ML) into semiconductor test and metrology is redefining the landscape for chip fabrication, which will be essential at advanced nodes and in increasingly dense advanced packages. Fabs today are inundated by vast amounts of data collected across multiple manufacturing processes, and AI/ML solutions are viewed as essential for... » read more

Integrating Digital Twins In Semiconductor Operations


By Mark da Silva, Nishita Rao and Karim Somani Chipmakers must adopt transformative technologies including Digital Twins (DT) to keep pace with unprecedented global semiconductor industry growth that is expected to drive its total market value to $1 trillion[1] as soon as 2030. Leveraging predictive modeling and other efficiency-enhancing innovations, DTs promise to optimize semiconductor d... » read more

Tackling Variability With AI-based Process Control


Jon Herlocker, co-founder and CEO of Tignis, sat down with Semiconductor Engineering to talk about how AI in advanced process control reduces equipment variability and corrects for process drift. What follows are excerpts of that conversation. SE: How is AI being used in semiconductor manufacturing and what will the impact be? Herlocker: AI is going to create a completely different factor... » read more

Chip Industry Week In Review


By Susan Rambo, Karen Heyman, and Liz Allan. Renesas plans to acquire Altium, maker of PCB design software, for $5.9 billion. In a conference call, Renesas CEO Hidetoshi Shibata cited Altium's PCB design software and digital twin virtual modeling as key components of its future strategy. "I believe it will generate transformational value for our combined customers and our stakeholders," Shib... » read more

ML-Assisted IC Test Binning With Real-Time Prediction At The Edge


IC Test is a critical part of semiconductor manufacturing and proper die binning and material disposition has an important impact on the overall yield and on the process monitoring and failure mode diagnostics. Edge analytics are becoming an increasingly important aspect of die disposition. By intercepting parts in real-time at the wafer test step, we can save downstream processing needs. In th... » read more

← Older posts