tag: semiconductor manufacturing

Fundamental Shifts In IC Manufacturing Processes
By Ed Sperling - 14 Mar, 2022 - Comments: 2

High chip value and 3D packaging are changing where and how tests are performed, tightening design-for-reliability and accelerating the shift of tools from lab to fab. Heterogeneous integration and more domain-specific designs are causing a string of disruptions for chip manufacturers, up-ending proven fab processes and methodologies, extending the time it takes to manufacture a chip, and ul... » read more

Weaving Digital Threads Into A Global Fabric Of Enterprise Knowledge
By Onto Innovation - 08 Mar, 2022 - Comments: 0

How smart manufacturing software provides visibility and control of all phases of the semiconductor manufacturing process. Run-to-run (R2R) automated process control gathers critical data from each production run and automatically adjusts process parameters for the next run based on sophisticated models of process performance. Click here to read more. » read more

Next-Gen Transistors
By Ed Sperling - 07 Mar, 2022 - Comments: 0

Nanosheets, or more generally, gate-all-around FETs, mark the next big shift in transistor structures at the most advanced nodes. David Fried, vice president of computational products at Lam Research, talks with Semiconductor Engineering about the advantages of using these new transistor types, along with myriad challenges at future nodes, particularly in the area of metrology. » read more

Reasserting U.S. Leadership in Microelectronics (MIT)
By Technical Paper Link - 19 Jan, 2022 - Comments: 0

In this new paper, MIT researchers lay out a vision and approach for how universities can help the U.S. regain leadership as a semiconductor superpower. The paper looks at education and workforce development, research, technology translation, startups, intellectual property, academic infrastructure and regional network efficiencies. Find the paper here and the MIT news writeup from 1/19/2022... » read more

Using Manufacturing Data To Boost Reliability
By Ed Sperling and Ann Mutschler - 07 Dec, 2021 - Comments: 0

As chipmakers turn to increasingly customized and complex heterogeneous designs to boost performance per watt, they also are demanding lower defectivity and higher yields to help offset the rising design and manufacturing costs. Solving those issues is a mammoth multi-vendor effort. There can be hundreds of process steps in fabs and packaging houses. And as feature sizes continue to shrink, ... » read more

Adaptive NN-Based Root Cause Analysis in Volume Diagnosis for Yield Improvement
By Technical Paper Link - 02 Dec, 2021 - Comments: 1

Abstract "Root Cause Analysis (RCA) is a critical technology for yield improvement in integrated circuit manufacture. Traditional RCA prefers unsupervised algorithms such as Expectation Maximization based on Bayesian models. However, these methods are severely limited by the weak predictive capability of statistical models and can’t effectively transfer the yield learning experience from old... » read more

Semiconductor Manufacturing Equipment And Measures To Protect The Earth’s Environment
By TEL - 17 Nov, 2021 - Comments: 0

Over the years, many countries on our planet have made significant efforts to develop their economies, achieving remarkable advancements in a wide variety of industries. However, the progress came with a great cost to the Earth’s environment. The destruction of nature has occurred frequently as a matter of course, to such an extent that in some regions it would hardly be possible to restore n... » read more

A graph placement methodology for fast chip design
By Technical Paper Link - 09 Nov, 2021 - Comments: 0

Abstract "Chip floorplanning is the engineering task of designing the physical layout of a computer chip. Despite five decades of research1, chip floorplanning has defied automation, requiring months of intense effort by physical design engineers to produce manufacturable layouts. Here we present a deep reinforcement learning approach to chip floorplanning. In under six hours, our method autom... » read more

Gearing Up For High-NA EUV
By Mark LaPedus - 21 Oct, 2021 - Comments: 2

The semiconductor industry is moving full speed ahead to develop high-NA EUV, but bringing up this next generation lithography system and the associated infrastructure remains a monumental and expensive task. ASML has been developing its high-numerical aperture (high-NA) EUV lithography line for some time. Basically, high-NA EUV scanners are the follow-on to today’s EUV lithography systems... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 17 Sep, 2021 - Comments: 0

Packaging and test Advantest and PDF Solutions have launched their first jointly developed offering since forming a partnership in 2020. The new product is called the Advantest Cloud Solutions Dynamic Parametric Test (ACS DPT) solution. It integrates PDF Solutions’ Exensio portfolio of data analytics with Advantest’s V93000 Parametric Test System. The ACS DPT solution is designed to op... » read more

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