The Evolution Of UCIe


Since it was released in March 2022, the Universal Chiplet Interconnect Express (UCIe) has grown from a basic way of connecting two dies together into a comprehensive specification that can ensure the handoff of data between various components in an advanced package, as well as validate the chiplets within that package. Mayank Bhatnagar, director of product marketing at Cadence, talks about the... » read more

How OCP S.O.L.I.D. Completes The Data Center Security Picture


In 2023, the Open Compute Project launched S.A.F.E. (Security Appraisal Framework and Enablement), a standardized process for auditing data center hardware and firmware. It delivered something the industry needed: approved third-party reviewers, continuous assessments, and public reports — not just one-time certifications. S.A.F.E. provided the audit framework; what it did not provide was gui... » read more

Addressing Semiconductor Cybersecurity Challenges through Robust Industry Standards and Globally Secure Frameworks


This presentation addresses critical cybersecurity challenges in semiconductor manufacturing by outlining current industry standards (SEMI E187, E188, E191) and their implementation through SMCC workgroups. It identifies key gaps in existing frameworks—particularly the inadequacy of current equipment connectivity standards for distributed collaboration and the scalability challenge of custom ... » read more

New Rules Put The Squeeze On Semiconductor Gray Market


The shift toward chiplets and multi-die assemblies is forcing big changes in the global supply chain, including much tighter cooperation between companies and governments to ensure the authenticity and quality of semiconductor parts. The chip industry has been looking to digital certificates as the best means of reducing counterfeiting and ensuring consistent quality for some time. The probl... » read more

Securing Silicon From the Start – Modular IP Solutions for Long-Term Resilience


Security isn’t a feature; it’s the foundation for any device that stores data, connects, or makes decisions. This eBook explores how to build more secure, future-ready products from the ground up — with modular IP, expert guidance, and end-to-end solutions proven across billions of SoCs. Key takeaways: Design with security from the ground up. Don’t rely on patches — embed prot... » read more

Security Requirements And Penalties Grow For Chipmakers


Governments and systems companies are fundamentally changing the rules around semiconductor security, forcing chipmakers and their suppliers to comply with tough new regulations that require resiliency in hardware. Unlike in the past, chips and systems deployed in these markets must be able to respond to threats rather than waiting for the next version of a chip or IP to address vulnerabilities... » read more

Security Power Requirements Are Growing


Determining how much power to budget for security in a chip design is a complex calculation. It starts with a risk assessment of the cost of a breach and the number of possible attack vectors, and whether security is active or passive. Different forms of root of trust and cryptography have different power costs. Different systems could require tradeoffs between performance and security, whic... » read more

Secure Interfaces for Critical Semiconductor Applications


Security is now a concern for nearly all semiconductors in nearly all applications. Once of high interest mostly for military and financial systems, both the increasingly connected world and the plethora of existing security threats have changed the landscape dramatically. Every aspect of electronic system design—hardware, firmware, and software—has its own sets of risks and requirements to... » read more

Rethinking Chip Economics


As process nodes shrink, so does the selection of chips developed at those nodes. Consumers demand more features and functionality, but that carries a high price tag in terms of both complexity and real dollars. In addition, because costs are skyrocketing, there is growing pressure for those chips to remain reliable and up-to-date for longer periods of time. Jayson Bethurem, vice president of m... » read more

Radix Coverage for Hardware Common Weakness Enumeration (CWE) Guide (updated)


MITRE’s hardware Common Weakness Enumeration (CWE) database aggregates hardware weaknesses that are the root causes of vulnerabilities in deployed parts. In this 100+ page guide, each CWE is listed along with a Radix template Security Rule that can be filled in with design-specific signals and used as a baseline test for the respective CWE. To learn more about a specific CWE, follow the li... » read more

← Older posts