Get Ready For The Next Generation Of Wearable Tech


Wearables have attracted a lot of attention recently, due to both their successes as well as failures. They bring together requirements for packaging, new substrates, power scavenging, low-power, novel connectivity, flexibility, durability, as well as fashion. While some of the challenges remain formidable, the long-term potential is driving the industry to look at what is possible. They are... » read more

Bringing Scalable Power Integrity Analysis To Analog IC Designs


Power integrity is a broad term in integrated circuit (IC) design and verification. However, when IC engineers are working through design signoff, power integrity analysis focuses on three specific aspects of a design: Power: Verify the chip design as implemented provides the total predicted power under different operating modes. Performance: Find and eliminate performance issues affect... » read more

40 GHz VCO and Frequency Divider in 28 nm FD-SOI CMOS Technology for Automotive Radar Sensors


Abstract: "This paper presents a 40 GHz voltage-controlled oscillator (VCO) and frequency divider chain fabricated in STMicroelectronics 28 nm ultrathin body and box (UTBB) fully depleted silicon-on-insulator (FD-SOI) complementary metal-oxide–semiconductor (CMOS) process with eight metal layers back-end-of-line (BEOL) option. VCOs architecture is based on an LC-tank with p-type metal-oxide�... » read more

Automotive Lidar Technologies Battle It Out


Lidar is likely to be added to the list of sensors that future cars will use to help with navigation and safety, but most likely it won't be the large rotating mirror assembly on the top of vehicles. Newer solid-state radar technologies are being researched and developed, although it’s not yet clear which of these will win. “The benefits of lidar technology are well known dating back to ... » read more

Safe And Robust Machine Learning


Deploying machine learning in the real world is a lot different than developing and testing it in a lab. Quenton Hall, AI systems architect at Xilinx, examines security implications on both the inferencing and training side, the potential for disruptions to accuracy, and how accessible these models and algorithms will be when they are used at the edge and in the cloud. This involves everything ... » read more

Changes In Sensors And DSPs


Pulin Desai, group director for product marketing, management and business development at Cadence, talks about why processing is moving closer to the end point, how to save energy through reduced area and sensor fusion, and the impact of specialization, 3D capture and always-on circuits. » read more

Customizing Chips For Power And Performance


Sandro Cerato, senior vice president and CTO of the Power & Sensor Systems Business Unit at Infineon Technologies, sat down with Semiconductor Engineering to talk about fundamental shifts in chip design with the rollout of the edge, AI, and more customized solutions. What follows are excerpts of that conversation. SE: The chip market is starting to fall into three distinct buckets, the e... » read more

Hyperconnectivity, Hyperscale Computing, And Moving Edges


As described in “The Four Pillars of Hyperscale Computing” last year, the four core components that development teams consider for data centers are computing, storage, memory, and networking. Over the previous decade, requirements for programmability have fundamentally changed data centers. Just over a decade ago, in 2010, virtual machines would compute user workloads on CPU-centric archite... » read more

In-Chip Sensing And PVT Monitoring: Not Just An Insurance Policy


You wouldn’t drive an expensive car without insurance or take a flight in an aircraft without performing instrument and control surface checks. So why would you take the risk of designing a multi-million dollar advanced node semiconductor device without making sure you are aware of, and able to manage, the dynamic conditions that had the potential to make or break a silicon product? Advanced... » read more

Testing Analog Circuits Becoming More Difficult


Foundries and packaging houses are wrestling how to control heat in the testing phase, particularly as devices continue to shrink and as thermally sensitive analog circuits are added into SoCs and advanced packages to support everything from RF to AI. The overriding problem is that heat can damage chips or devices under test. That's certainly true for digital chips developed at advanced node... » read more

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