Week In Review: Design, Low Power

By Jesse Allen - 04 Aug, 2023 - Comments: 0

Qualcomm, NXP, Infineon, Nordic, and Bosch are jointly investing in a new RISC-V company, to be formed in Germany, that will speed up RISC-V’s adoption in commercial products. The company will be “a single source to enable compatible RISC-V based products, provide reference architectures, and help establish solutions widely used in the industry,” according to a press release. The co... » read more

Solving the AppSec Puzzle: Connecting AppSec To Your DevOps Pipeline

By Synopsys - 02 Aug, 2023 - Comments: 0

Integrating application security (AppSec) into your software development life cycle and DevOps pipeline is increasingly important in today’s development environment. Commonly referred to as “shifting left” or “shifting everywhere,” AppSec integration helps avoid the late-stage testing and development that can delay product releases or lead to overlooked risks being promoted into produ... » read more

Shift Left, Extend Right, Stretch Sideways

By Brian Bailey - 27 Jul, 2023 - Comments: 0

The EDA industry has been talking about shift left for a few years, but development flows are now being stretched in two additional ways, extending right to include silicon lifecycle management, and sideways to include safety and security. In addition, safety and security join verification and power as being vertical concerns, and we are increasingly seeing interlinking within those concerns. ... » read more

Calibre DesignEnhancer Design-Stage Layout Modification Improves Power Management Faster And Earlier

By Siemens EDA - 19 Jul, 2023 - Comments: 0

The faster a design can progress from implementation to signoff verification, the better the chances are of meeting tapeout schedules. The Calibre DesignEnhancer platform offers P&R and custom/analog design teams a fast, integrated environment for implementing Calibre-clean design modifications to reduce IR drop and EM and prepare for physical verification. Not only can designers reduce EM and ... » read more

Better Choreography Required For Complex Chips

By Karen Heyman - 22 Jun, 2023 - Comments: 0

The rapidly growing number of features and options in chip design are forcing engineering teams to ratchet up their planning around who does what, when it gets done, and how various components will interact. In effect, more elements in the design flow need to be choreographed much more precisely. Some steps have to shift further left, while others need to be considered earlier in the plannin... » read more

Device Validation: The Ultimate Test Frontier

By Dave Armstrong - 11 Apr, 2023 - Comments: 0

This article is a condensed version of an article that appeared in the November/December 2022 issue of Chip Scale Review. Adapted with permission. Read the original article at https://chipscalereview.com/wp-content/uploads/flipbook/30/book.html, p. 26. In the early days of space exploration, spacecraft were manned by small teams of astronauts, most of whom were experienced test pilots who ... » read more

Building Better Cars Faster

By John Koon - 02 Feb, 2023 - Comments: 0

Carmakers are accelerating their chip and electronic design schedules to remain competitive in an increasingly fast-changing market, but they are encountering gaps in the tooling, the supply chain, and in the methodologies they use to create those cars. While it's easy to envision how CAD software could be used to create the next new vehicle’s 3-D look, and how simulation software helps de... » read more

EVs Raise Energy, Power, And Thermal IC Design Challenges

By Ann Mutschler - 06 Oct, 2022 - Comments: 0

The transition to electric vehicles is putting pressure on power grids to produce more energy and on vehicles to use that energy much more efficiently, creating a gargantuan set of challenges that will affect every segment of the automotive world, the infrastructure that supports it, and the chips that are required to make all of this work. From a semiconductor standpoint, improvements in th... » read more

Memory Design Shift Left To Achieve Faster Development Turnaround Time

By Anand Thiruvengadam - 15 Aug, 2022 - Comments: 0

As noted in a recent blog post, demand for more memory is a common theme for many semiconductor-driven products. Artificial intelligence (AI) and machine learning (ML) algorithms rely on fast, plentiful memory for real-time performance, and storage at all levels is key to data-intensive applications. General-purpose memory devices are giving way to customized chips for applications such as AI, ... » read more

Turning MBSE Inside-Out For An RF EDA Shift Left

By Don Dingee - 19 Apr, 2022 - Comments: 0

Model-based systems engineering (MBSE) focuses on creating and exploiting domain models in a digital modeling language. RF system designers trying to use generic MBSE tools soon run into a problem: developing behavioral models. Without high-fidelity models, simulations miss real-world results, and a digital twin won’t be worth the effort. What’s helping RF teams get engineering tasks done i... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?