tag: shift left

Machine Learning Enabled Root Cause Analysis For Low Power Verification
By Himanshu Bhatt - 13 Jul, 2020 - Comments: 0

By Himanshu Bhatt and Susantha Wijesekara Next-generation SoCs with advanced graphics, computing and artificial intelligence capabilities are posing unforeseen challenges in verification. Designers and verification engineers using static verification technologies for low power often see many violations in the initial stages. Efficient debugging and determining root cause is a real issue and ... » read more

Shift Left Verification With Comprehensive Lint Signoff
By Synopsys - 08 Jul, 2020 - Comments: 0

With soaring complexity and continuously increasing chip sizes, achieving efficient and predictable design closure has become a prominent challenge among designers today. Demand for a faster time to market is forcing designers to find ways to shorten design cycles with accurate, efficient, one-time RTL to silicon. To meet these requirements designers are looking to implement early ”shift left... » read more

Fusing Implementation And Verification
By Ed Sperling - 02 Mar, 2020 - Comments: 0

Susantha Wijesekara, senior application engineer at Synopsys, drills down into how to re-use Tcl scripts for static verification, what needs to be done with those scripts to make that possible, why that is critical to “shift left,” and how that approach saves time, money, and improves quality. » read more

Hybrid Prototyping
By Ed Sperling - 26 Feb, 2020 - Comments: 1

David Svensson, applications engineer in Synopsys’ Verification Group, explains how a virtual transaction logic model can be connected to develop hardware-dependent drivers before RTL actually exists, why this is now critical for large, complex designs, and how to find the potential bottlenecks and debug both software and hardware. » read more

Automotive Chip Design Workflow
By Ed Sperling - 17 Feb, 2020 - Comments: 0

Stewart Williams, senior technical marketing manager at Synopsys, talks about the consolidation of chips in a vehicle and the impact of 7/5nm on automotive SoC design, how to trade off power, performance, area and reliability, and how ISO 26262 impacts those variables. » read more

Design For Airborne Electronics
By Ann Mutschler - 03 Feb, 2020 - Comments: 0

The Next Generation Air Transportation System (NextGen), an FAA-led modernization of America's air transportation system meant to make flying more efficient, predictable and safer, is currently underway as one of the most ambitious infrastructure projects in U.S. history. This is not just a minor upgrade to an aging infrastructure. The FAA and partners are in the process of implementing new ... » read more

Dealing With ECOs In Complex Designs
By Ed Sperling - 22 Jan, 2020 - Comments: 0

Namsuk Oh, R&D principal engineer at Synopsys, talks about the impact of more corners and engineering change orders, how that needs to be addressed in the flow to close timing, and how dependencies can complicate any changes that are required. » read more

Using Static Analysis For Functional Safety
By Ed Sperling - 15 Jan, 2020 - Comments: 0

Fadi Maamari, group director for R&D at Synopsys, explains why static analysis is suddenly in demand in auto chip design, how it can help to choose the best implementation of functional safety approaches, and where it fits into the design flow. » read more

Transforming Silicon Bring-Up
By Brian Bailey - 26 Nov, 2019 - Comments: 0

Not too long ago, the return of first silicon from the foundry was a nail-biting moment as power was applied to the chip. Today, better verification methodologies, increased use of emulation, and more mature fabrication practices have transformed how teams utilize first silicon. It is about to be transformed again, and there are some interesting possibilities on the horizon. Much of what use... » read more

Thoroughly Verifying Complex SoCs
By Ann Mutschler - 26 Nov, 2019 - Comments: 0

The number of things that can go wrong in complex SoCs targeted at leading-edge applications is staggering, and there is no indication that verifying these chips will function as expected is going to get any easier. Heterogeneous designs developed for leading-edge applications, such as 5G, IoT, automotive and AI, are now complex systems in their own right. But they also need to work in conju... » read more

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