tag: Si2

Week In Review: Design, Low Power
By Jesse Allen - 05 Jul, 2019 - Comments: 0

Si2's Unified Power Model has been approved as IEEE 2416-2019, a new Standard for Power Modeling to Enable System Level Analysis, which complements UPF/IEEE 1801-2018. UPM/IEEE 2416-2019 provides a set of power modeling semantics enabling system designers to model entire systems with flexibility. It supports power modeling from abstract design description to gate level implementation, providing... » read more

Week In Review: Design, Low Power
By Jesse Allen - 07 Jun, 2019 - Comments: 0

M&A Infineon Technologies will acquire Cypress Semiconductor for $23.85 per share in cash, or $10.1 billion. The deal will place Infineon as the number eight chip manufacturer in the world based on 2018 revenues and create an automotive powerhouse, making the combined company the largest supplier of chips to the automotive market. Infineon sees potential to reach into new industrial and co... » read more

The Time Is Now For A Common Model Interface
By Ahmed Ramadan - 28 Feb, 2019 - Comments: 0

By Ahmed Ramadan and Greg Curtis Driven by consumer demand for “cheaper, faster, and better,” the semiconductor industry is continually pushing the migration to smaller process geometries. This continued scaling of complex designs into advanced process nodes is critical for applications ranging from high-performance computing to low-power mobile devices. In the past, products like sma... » read more

Design For Advanced Packaging
By Brian Bailey - 08 Nov, 2018 - Comments: 0

Advanced packaging techniques are viewed as either a replacement for Moore's Law scaling, or a way of augmenting it. But there is a big gap between the extensive work done to prove these devices can be manufactured with sufficient yield and the amount of attention being paid to the demands advanced packaging has on the design and verification flows. Not all advanced packaging places the same... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 19 Oct, 2018 - Comments: 0

Chipmakers Amid ongoing delays with its 10nm process, Intel has reorganized its manufacturing unit, according to a report from The Oregonian/OregonLive. Sohail Ahmed, who has jointly led the unit since 2016, will retire next month, according to the report. The industry is racing to put extreme ultraviolet (EUV) lithography into production. TSMC recently taped-out its first 7nm chip using E... » read more

Week In Review: Design, Low Power
By Jesse Allen - 19 Oct, 2018 - Comments: 0

Arm announced its new roadmap promising 30% annual system performance gains on leading edge nodes through 2021. These gains are to come from a combination of microarchitecture design to hardware, software and tools. They are branding this new roadmap 'Neoverse.' The first delivery will be Ares – expected in early 2019 – for a 7nm IP platform targeting 5G networks and next-generation cloud t... » read more

Week In Review: Design, Low Power
By Jesse Allen - 12 Oct, 2018 - Comments: 0

Deals AI startup Enflame (Suiyuan) Technology purchased multiple licenses of Arteris IP's FlexNoC interconnect IP for use as the on-chip communications backbone of its AI training chips for use in cloud datacenters. Enflame cited easy creation of regular topologies used in AI chips and the ability to take advantage of HBM2 memories. Phison, a maker of NAND flash controller ICs, inked�... » read more

Aging In Advanced Nodes
By Ann Mutschler - 17 Sep, 2018 - Comments: 0

Semiconductor Engineering sat down to discuss design reliability and circuit aging with João Geada, chief technologist for the semiconductor business unit at ANSYS; Hany Elhak, product management director, simulation and characterization in the custom IC and PCB group at Cadence; Christoph Sohrmann, advanced physical verification at Fraunhofer EAS; Magdy Abadir, vice president of marketing at ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 20 Jul, 2018 - Comments: 0

Aldec expanded the rule-checking capabilities of its ALINT-PRO tool, adding twice as many FSM checks and new graphical representations to aid state exploration. Also included is enhanced setup automation for complex Xilinx Vivado and ISE projects that automatically organizes a workspace to deliver hierarchical and incremental DRC and CDC analysis. Xilinx acquired AI startup DeePhi Technology... » read more

The Week In Review: Design
By Jesse Allen - 11 May, 2018 - Comments: 0

M&A IoT-focused memory chipmaker Adesto Technologies acquired S3 Semiconductors, a provider of mixed-signal and RF ASICs and IP. Based in Ireland, S3 Semiconductors was founded in 1986. S3 Semiconductors will become a business unit of Adesto and will continue to operate under its current model in the $35 million deal. S3 Semiconductor's parent company, S3 Group, will continue as a separate... » read more

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