Power, Standards And The IoT


Semiconductor Engineering sat down to discuss power, standards and the IoT with Jerry Frenkil, director of open standards at [getentity id="22055" comment="Si2"]; Frank Schirrmeister, group director of product marketing of the System Development Suite at [getentity id="22032" e_name="Cadence"]; Randy Smith, vice president of marketing at [getentity id="22605" e_name="Sonics"]; and Vojin Zivojno... » read more

One Flow To Rule Them All


The new mantra of shift left within EDA is nothing new and first made an appearance more than a decade ago. At that time there was a very large divide between logic synthesis and place and route. As wire delays became more important, timing closure became increasingly difficult with a logic synthesis flow that did not take that into account. The tools subsequently became tied much closer togeth... » read more

Power, Standards And The IoT


Semiconductor Engineering sat down to discuss power, standards and the IoT with Jerry Frenkil, director of open standards at [getentity id="22055" comment="Si2"]; Frank Schirrmeister, group director of product marketing of the System Development Suite at [getentity id="22032" e_name="Cadence"]; Randy Smith, vice president of marketing at [getentity id="22605" e_name="Sonics"]; and Vojin Zivojno... » read more

The Week In Review: Design/IoT


Summit Research reports on the proposed buyout of Micron by China's Tsinghua Unigroup. New York Senator Chuck Schumer wrote a letter urging the United States to block any potential sale of the Boise memory-chip maker to the group. Summit states the Tsinghua investment is more likely to be a stake in Micron that specifically forbids certain IP to be made available in order to protect national se... » read more

DAC 2015: Day 3


The schedule for today revolves around eating and it is perfectly balanced between the big three. The morning starts with breakfast for the Cadence panel titled "Crossing the Great Divide: How to Safely Navigate the move from 28nm to 16FF+." The panel was moderated by Brian Fuller and panelists included Jayanta Lahiri from ARM, Afshin Montaz from Broadcom, Scott McCormack from Freescale, Yan... » read more

The Week In Review: Design/IoT


Mergers & Acquisitions NXP acquired Quintic’s Bluetooth Low Energy and Wearable businesses, adding BLTE to their low power RF-connectivity portfolio. The team of approximately 65 is expected to join NXP when the deal closes in Q1 2015. Tools Cadence unveiled the integration of Forte's Cynthesizer with their own C-to-Silicon Compiler. The result is the Stratus high-level synthesis... » read more

Getting The Right Return On Invested Power Consumption


Three weeks ago, I participated in a panel on low power and modeling at the system level. It took place at DesignCon 2015 in Santa Clara, together with representatives from AMD, Avago, and Qualcomm. Interestingly enough, it gave me the opportunity to set some of the myths and dis-information about power consumption in emulation straight, but more on that later. The panel was moderated by Steve ... » read more

Si2 Leadership Change


Steve Schulz, who had been president and CEO of standards body Si2 for the past 12 years has resigned from the organization, Semiconductor Engineering learned today. He said he has thoroughly enjoyed the 12-1/2 years that he was with Si2 and is very, very proud of the successes from rebuilding it when he first joined and all of the growth the organization has had. “I still have a lot o... » read more

Unraveling Power Methodologies


When working on articles, the editors at Semiconductor Engineering sometimes hear things that make them stand back and question what seems to be an industry truth. One such statement happened last month while researching a different article. The statement was: Most designs are not top-down, but in fact bottom-up when it comes to power management. The most used methodology today is that the RTL... » read more

Important Changes Ahead


Two of Si2's important industry standards efforts will be featured later this month at DesignCon, a popular Silicon Valley event that is now in its 20th year. In the panel entitled, "System-Level Power Modeling—What's the Big Deal?", leading industry experts from AMD, Avago Technologies, Cadence, Docea Power, Qualcomm, and Si2 will focus on the growing need to take a higher level and more... » read more

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