tag: Siemens EDA

Blog Review: Mar. 6
By Jesse Allen - 06 Mar, 2024 - Comments: 0

Synopsys' Gandharv Bhatara notes that successfully deploying high-NA EUV will rely on computational lithography to provide accurate modeling of aberrations, compact 3D mask modeling, and expand inverse lithography to full-chip processing. Cadence's John Park argues for using a systematic and automated system for co-design and co-analysis of multi-die packages to reduce the margin for human e... » read more

Optimizing EDA Cloud Hardware And Workloads
By Aharon Etengoff - 04 Mar, 2024 - Comments: 0

Optimizing EDA hardware for the cloud can shorten the time required for large and complex simulations, but not all workloads will benefit equally, and much more can be done to improve those that can. Tens of thousands of GPUs and specialized accelerators, all working in parallel, add significant and elastic compute horsepower for complex designs. That allows design teams to explore various a... » read more

Commercial Chiplet Ecosystem May Be A Decade Away
By Ann Mutschler - 29 Feb, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about the challenges of establishing a commercial chiplet ecosystem with Frank Schirrmeister, vice president solutions and business development at Arteris; Mayank Bhatnagar, product marketing director in the Silicon Solutions Group at Cadence; Paul Karazuba, vice president of marketing at Expedera; Stephen Slater, EDA product mana... » read more

Maximizing Efficiency And Productivity: The Benefits Of Shift Left Verification For IP Designers
By Terry Meeks - 29 Feb, 2024 - Comments: 0

Intellectual property (IP) designers play a crucial role by creating reusable components that form the building blocks of larger integrated circuit (IC) designs. These components, whether developed in-house or acquired from specialized IP design companies, are essential for providing core functionality such as memory and standard libraries. However, designing and verifying IP is a complex and d... » read more

A Game-Changer For IP Designers: Design-Stage Verification
By Siemens EDA - 28 Feb, 2024 - Comments: 0

Discover how to transform your IP design process with the Calibre Shift left initiative. In this new technical paper, you’ll gain valuable insights into how, by moving physical verification earlier in the IP design flow, you can locate and correct design errors sooner, reducing costs and getting complex designs to market faster. Dive into the challenges of hard, soft and custom IP creation, a... » read more

Blog Review: Feb. 21
By Jesse Allen - 21 Feb, 2024 - Comments: 0

Siemens' John McMillan digs into physical verification maturity for high-density advanced packaging (HDAP) designs and major differences in the LVS verification flow compared to the well-established process for SoCs. Synopsys' Varun Shah identifies why a cloud adoption framework is key to getting the most out of deploying EDA tools in the cloud, including by ensuring that different types of ... » read more

Why Chiplets Are So Critical In Automotive
By John Koon - 20 Feb, 2024 - Comments: 1

Chiplets are gaining renewed attention in the automotive market, where increasing electrification and intense competition are forcing companies to accelerate their design and production schedules. Electrification has lit a fire under some of the biggest and best-known carmakers, which are struggling to remain competitive in the face of very short market windows and constantly changing requir... » read more

The Seven Pillars Of IC Package Physical Design
By Keith Felton - 15 Feb, 2024 - Comments: 0

Today’s heterogeneously integrated semiconductor packages represent a breakthrough technology that enables dramatic increases in bandwidth and performance with reduced power and cost compared to what can be currently achieved in traditional monolithic SoC designs. Figure 1. A heterogeneously integrated device with 47 chiplets. (Image Source: Intel) The evolving landscape of packagin... » read more

AI Tradeoffs At The Edge
By Ann Mutschler - 15 Feb, 2024 - Comments: 0

AI is impacting almost every application area imaginable, but increasingly it is moving from the data center to the edge, where larger amounts of data need to be processed much more quickly than in the past. This has set off a scramble for massive improvements in performance much closer to the source of data, but with a familiar set of caveats — it must use very little power, be affordable... » read more

Re-architecting Hardware For Energy
By Brian Bailey - 15 Feb, 2024 - Comments: 0

A lot of effort has gone into the power optimization of a system based on the RTL created, but that represents a small fraction of the possible power and energy that could be saved. The industry's desire to move to denser systems is being constrained by heat, so there is an increasing focus on re-architecting systems to reduce the energy consumed per useful function performed. Making signifi... » read more

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