Internet of FD-SOI Things?

By Katherine Derbyshire - 18 Feb, 2016 - Comments: 0

Are fully-depleted silicon-on-insulator (FD-SOI) wafers having a moment? Certainly SOI wafers are not new. Soitec’s SmartCut layer transfer technology was patented in 1994, and wafers with implanted oxide layers were available before that. Still, adoption of SOI wafers has been limited. Though they offer improved device isolation and reduced parasitics, the increased wafer cost has been an ob... » read more

Inside Inspection And Metrology

By Mark LaPedus - 18 Dec, 2015 - Comments: 0

Semiconductor Engineering sat down to talk about inspection, metrology and other issues with Mehdi Vaez-Iravani, vice president of advanced imaging technologies at Applied Materials. What follows are excerpts of that conversation. SE: Today, the industry is working on a new range of complex architectures, such as 3D NAND and finFETs. For these technologies, the industry is clearly struggling... » read more

Measuring FinFETs Will Get Harder

By Mark LaPedus - 19 Nov, 2015 - Comments: 2

The industry is gradually migrating toward chips based on finFET transistors at 16nm/14nm and beyond, but manufacturing those finFETs is proving to be a daunting challenge in the fab. Patterning is the most difficult process for finFETs. But another process, metrology, is fast becoming one of the biggest challenges for the next-generation transistor technology. In fact, [getkc id="252" kc_n... » read more

Increasing Challenges At Advanced Nodes

By Ed Sperling - 22 Oct, 2015 - Comments: 1

Gary Patton, chief technology officer at GlobalFoundries, sat down with Semiconductor Engineering to talk about new materials, stacked die, how far FD-SOI can be extended, and new directions for interconnects and transistors. What follows are excerpts of that conversation. SE: Where do you see problems at future nodes? Patton: At the device level, we have to be able to pattern these thing... » read more

Moving Electrons Is Getting Harder

By Ed Sperling - 13 Aug, 2015 - Comments: 1

Numerous executives across the ecosystem—from EDA and equipment companies to foundries—recently have stated that Moore's Law has at least 10 more years of life. This is interesting math, considering the semiconductor industry is now working on 10nm, with chips expected to roll out next year. So given that Moore's Law is on a two-year cadence of doubling the number of transistors every 24... » read more

Pathfinding Beyond 10nm

By Paula Doe - 10 Aug, 2015 - Comments: 0

After higher aspect-ratio finFETs and higher mobility SiGe and III-V materials, the industry will move to lateral nanowires and then to vertical nanowire transistors, and to new tunnel junction FETs or spin wave architectures ─ or to various combinations of these technologies for different applications, reported An Steegan, Imec senior vice president of process technology, during SEMICON West... » read more

Reliability After Planar Silicon

By Katherine Derbyshire - 29 Jul, 2015 - Comments: 2

Negative bias temperature instability (NBTI) poses a very serious reliability challenge for highly scaled planar silicon transistors, as previously discussed. However, the conventional planar silicon transistor appears to be nearing the end of its life for other reasons, too. The mobility of carriers in silicon limits switching speed even as it becomes more difficult to maintain sufficient elec... » read more

Tech Talk: 22nm FD-SOI

By Ed Sperling - 13 Jul, 2015 - Comments: 0

Subramani Kengeri, vice president of global design solutions at GlobalFoundries, discusses the evolution of 22nm FD-SOI and its advantages, including single patterning in the middle end of line, 0.4 volt operating voltage, and how it compares to finFETs in terms of performance. [youtube vid=5fa1AcIGcUw] » read more

Here Comes 7nm

By Ed Sperling - 09 Jul, 2015 - Comments: 0

A consortium of companies involving IBM, GlobalFoundries and Samsung has rolled out the first 7nm test chip using silicon germanium as a substrate, using EUV to pattern multiple layers. While this doesn't mean the cost equation is even close to being solved, or that more than a handful of companies will push forward to that node anytime soon using SiGe as the substrate material, it does cre... » read more

An Inside Look At The GlobalFoundries-IBM Deal

By Ed Sperling - 20 Nov, 2014 - Comments: 3

GlobalFoundries' proposed acquisition of IBM Microelectronics is the kind of deal that will have business schools talking for many years to come—a gargantuan combination of expertise and technology, built on the back of high-profile business successes and failures, long-running legal struggles and global politics—with far-reaching implications for all parts of the semiconductor supply chain... » read more

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Knowledge Centers
Entities, people and technologies explored

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3.5D: The Great Compromise

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eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

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