Intel and Cadence Collaboration on UCIe: Demonstration of Simulation Interoperability


The Universal Chiplet Interconnect Express (UCIe) 1.0 specification was announced in early 2022. A new updated UCIe 1.1 specification was released on August 8, 2023. The standardized open chiplet standard allows for heterogeneous integration of die-to-die link interconnects within the same package. The UCIe standard allows for advanced package and standard package options to tradeoff cost, band... » read more

The Impact Of Simulation On The Carbon Footprint of Wafer Fab Equipment R&D


A new technical paper titled "Achieving Sustainability in the Semiconductor Industry: The Impact of Simulation and AI" was published by researchers at Lam Research. Abstract "Computational simulation has been used in the semiconductor industry since the 1950s to provide engineers and managers with a faster, more cost-effective method of designing semiconductors. With increased pressure in t... » read more

Aeroacoustics Large-Eddy Simulation of VTOL Aircraft Design


This conference paper, co-authored by Honda Motor Co. and Cadence, reveals  findings on the aeroacoustics predictions of multibladed vertical take-off and landing (VTOL) rotors using large-eddy simulations (LES). Why should you read this white paper? Advanced Simulations: We conducted simulations on VTOL rotors with two to five blades, assessing high-frequency noise predictions. Exp... » read more

Essential Insights for Design PCIe 6.0 Interconnects


PCI Express (PCIe) is a serial communication protocol that has progressed through generations to enhance data rates and functionality. The latest version, PCIe 6.0, doubles the data rate to 64 GT/s, enabling up to 256 GB/s of bandwidth in an x16 configuration. The technology incorporates PAM4 signaling and forward error correction to maintain high speeds with improved signal integrity and relia... » read more

Digital Twins Find Their Footing In IC Manufacturing


Momentum is building for digital twins in semiconductor manufacturing, tying together the various processes and steps to improve efficiency and quality, and to enable more flexibility in the fab and assembly house. The movement toward digital twins opens up a slew of opportunities, from building and equipping new fabs faster to speeding yield ramps by reducing the number of silicon-based tes... » read more

Digital Twins Gaining Traction In Complex Designs


The integration of heterogeneous chiplets into an advanced package, coupled with the increasing digitalization of multiple industry segments, is pushing digital twins to the forefront of design. The challenge in these complex assemblies is figuring out the potential tradeoffs between different chiplets, different assembly approaches, and to be able to do it quickly enough to still hit market... » read more

Distribution of Currents In Via Arrays


It has become increasingly difficult in recent years to provide adequate PDNs on a PCB. The sheer number of different voltages, combined with increased current demands, makes distributing current around the board a substantial layout challenge. This paper demonstrates that by using appropriate and accurate simulations, combined with the improved intuition that such simulations bring, it is a ch... » read more

Steady and Unsteady Full-Engine Simulations


Discover the power of fully coupled steady and unsteady full-engine simulations. Say goodbye to traditional component-by-component methods. This innovative approach seamlessly integrates all engine components into a single, cohesive simulation framework, offering unparalleled accuracy and efficiency for aero-engine simulations. Key Takeaways: Steady and Time-Accurate: Achieve superio... » read more

Memory System Benchmarking, Simulation, And Application Profiling Via A Memory Stress Framework


A technical paper titled “A Mess of Memory System Benchmarking, Simulation and Application Profiling” was published by researchers at Barcelona Supercomputing Center, Unversitat Politecnica de Catalunya, and Micron Technology (Italy). Abstract: "The Memory stress (Mess) framework provides a unified view of the memory system benchmarking, simulation and application profiling. The Mess benc... » read more

Innovating Electric Mobility: Simulation Solutions For Electric Machines


Automakers desire solutions that can easily scale to new applications of next generation vehicles. Electrified propulsion technology is one main area where EV engineers are pushing the boundaries. Electric machine design and integration choices have system-level impacts that directly influence an automaker’s time to market and even overall market adoption. With Ansys multiphysics simulatio... » read more

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