Simulating Multiple DSPs As Multiple x86 Processes


An increasing number of embedded designs are multi-core systems. At the pre-silicon stage, customers use a simulation platform for architectural exploration and software development. Architects want to quantify the impact of the number of cores, local memory size, system memory latency, and interconnect bandwidth. Software teams wish to have a practical development platform that is not excrucia... » read more

Accelerating Verification Of Computational Storage Designs Using Avery NVMe Verification IP


Computational storage is an emerging paradigm that integrates processing capabilities directly within storage devices. This paper outlines how this approach addresses the limitations of traditional NVM Express (NVMe) SSDs and the performance characteristics of the newly introduced compute and subsystem local memory (SLM) namespaces. The paper also focuses on the verification framework provided ... » read more

How to Accelerate Multiphysics Simulation Software with Turnkey Hardware Systems


Complicated problems take longer to solve. In engineering, it’s a given that simulation drastically accelerates the development cycle, enabling engineers to digitally test ideas and optimize products exponentially faster than physical testing. However, today’s complex products and systems require simulation of many different physics—the thermal, structural, and electromagnetic forces in a... » read more

Preparing For The Multiphysics Future Of 3D ICs


3D integrated circuits (3D ICs) are emerging as a revolutionary approach to design, manufacturing and packaging in the semiconductor industry. Offering significant advantages in size, performance, power efficiency and cost, 3D ICs are poised to transform the landscape of electronic devices. However, with 3D ICs come new design and verification challenges that must be addressed to ensure success... » read more

Managing Reflections With Terminations


Have you heard recommendations to use a particular termination in particular situations for good signal integrity? Have you ever wondered how to incorporate terminations in your design? While there are typical use cases for various terminations, sometimes engineers use termination techniques based on a recommendation or assumption that may not work, or at least may not be optimal, for their par... » read more

Four Real-World Applications for Electromagnetic Simulation


With the complexity of integrated circuit (IC) components increasing, electromagnetic (EM) circuit simulation is now critical for accurate and efficient design. The EM effects on a circuit can drastically alter voltage levels and damage semiconductor devices. With EM simulation, designers can account for EM effects on their circuit to avoid costly problems before they happen. EM simulation e... » read more

Simulation Replay Tackles Key Verification Challenges


Simulation lies at the heart of both verification and pre-silicon validation for every semiconductor development project. Finding functional or power problems in the bringup lab is much too late, leading to very expensive chip turns. Thorough simulation before tapeout, coupled with comprehensive coverage metrics, is the only way to avoid surprises in silicon. However, the enormous size and comp... » read more

Challenges and Best Practices for TCO Models of Technical Computing Resources for Engineering Modeling and Simulation Workflows


Many organizations focus heavily on the system’s initial capital cost when developing criteria and reviewing proposals for new procurements. While this is crucial for evaluating ROI, research shows that the initial purchase cost accounts for only half of the total expenses over the system’s useful life. This data point highlights the importance of understanding the total cost of ownership (... » read more

Intel and Cadence Collaboration on UCIe: Demonstration of Simulation Interoperability


The Universal Chiplet Interconnect Express (UCIe) 1.0 specification was announced in early 2022. A new updated UCIe 1.1 specification was released on August 8, 2023. The standardized open chiplet standard allows for heterogeneous integration of die-to-die link interconnects within the same package. The UCIe standard allows for advanced package and standard package options to tradeoff cost, band... » read more

The Impact Of Simulation On The Carbon Footprint of Wafer Fab Equipment R&D


A new technical paper titled "Achieving Sustainability in the Semiconductor Industry: The Impact of Simulation and AI" was published by researchers at Lam Research. Abstract "Computational simulation has been used in the semiconductor industry since the 1950s to provide engineers and managers with a faster, more cost-effective method of designing semiconductors. With increased pressure in t... » read more

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