Best Practice: Scale-Resolving Simulations In Ansys CFD


While today’s CFD simulations are mainly based on Reynolds-Averaged Navier-Stokes (RANS) turbulence models, it is becoming increasingly clear that certain classes of flows are better covered by models in which all or a part of the turbulence spectrum is resolved in at least a portion of the numerical domain. Such methods are termed Scale-Resolving Simulation (SRS) models in this paper. This r... » read more

Recipe To Catch Bugs Faster Using Machine Learning


We all agree that verification and debug take up a significant amount of time and are arguably the most challenging parts of chip development. Simulator performance has consistently topped the charts and is a critical component in the verification process. Still, the need of the hour is to stretch beyond simulator speed to achieve maximum verification throughput and efficiency. Artificial in... » read more

Artificial Intelligence 101: It’s Math, Not Magic


The term artificial intelligence (AI) can be somewhat misleading. While the medium of intelligence is designed (and, in that sense, artificial or human-made), the intelligence itself is based on very real data. However, most people hear “AI” and think of futuristic robots or scenes from science fiction movies, not recognizing that the origin of AI is not fictional or magical — it’s math... » read more

Interactive Point-To-Point Resistance Simulations


Point to point (P2P) resistance simulations calculate the effective resistance of the layout traces between points on an IC net trace, and let the designer know that there may be too much parasitic resistance from a particular net trace that would affect the reliability or performance of the circuit. However, traditional P2P simulation runs are time-consuming, and often require multiple iterati... » read more

Better, Faster, And More Efficient Verification With The Power Of AI


Verification is often the most challenging part of the chip development process. Verification engineers have to balance quality of results (QOR) with time to results (TTR) and cost of results (COR). AI and ML technologies can play a significant part in increasing QOR, speeding up TTR, and reducing COR. This white paper outlines some of the major challenges for verification, describes how AI pro... » read more

Overview of Hardware-In-The-Loop (HIL) Simulations


This technical paper titled "Hardware-in-the-Loop Simulations: A Historical Overview of Engineering Challenges" was published by researchers at University of Maribor, Slovenia. Abstract: "The design of modern industrial products is further improved through the hardware-in-the-loop (HIL) simulation. Realistic simulation is enabled by the closed loop between the hardware under test (HUT) and ... » read more

Artificial Neural Network (ANN)-Based Model To Evaluate The Characteristics of A Nanosheet FET (NSFET)


This new technical paper titled "Machine-Learning-Based Compact Modeling for Sub-3-nm-Node Emerging Transistors" was published by researchers at SungKyunKwan University, Korea. Abstract: "In this paper, we present an artificial neural network (ANN)-based compact model to evaluate the characteristics of a nanosheet field-effect transistor (NSFET), which has been highlighted as a next-generat... » read more

Challenges Grow For Modeling Auto Performance, Power


Rising complexity in automobiles is creating huge challenges about how to add more safety and comfort features and electronics into vehicles without reducing the overall range they can travel or pricing them so high that only the rich can afford them. While the current focus is on modeling hardware and software to understand interactions between systems, this remains a huge challenge. It req... » read more

Choosing The Right Photonic Device Design Software


There are many factors to consider before deciding which software to use for photonic device design. To narrow the field, it can be helpful to ask these key questions as you investigate and compare software functionality. • Does the software provide enough flexibility to model and analyze products that offer the best solution to likely and possible design goals? • Is the simulation ca... » read more

Assessing & Simulating Semiconductor Side-Channel or Unintended Data Leakage Vulnerabilities


This research paper titled "Multiphysics Simulation of EM Side-Channels from Silicon Backside with ML-based Auto-POI Identification" from researchers at Ansys, National Taiwan University and Kobe University won the best paper award at IEEE's International Symposium on Hardware Oriented Security and Trust (HOST). The paper presents a new tool "to assess unintended data leakage vulnerabilities... » read more

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