tag: SoC

7 Ways to Assess Semiconductor IP Quality
By Kurt Shuler - 30 Jul, 2015 - Comments: 0

Design teams today are struggling with the quality of semiconductor intellectual property. These teams want first-pass success for SoC creation, but that is becoming increasingly difficult to achieve—especially with highly configurable IP. Yet the more configurable the IP is, the more desirable it is as a differentiator. And if not developed correctly, it may be even more risky than non-confi... » read more

Accelerate SoC Simulation Time Of Newer Generation FPGAs
By Aldec - 29 Jul, 2015 - Comments: 0

Comprehensive verification that can be provided by HDL simulators is good, but not ideal. What is necessary is a faster, safer, and more thorough verification environment that combines the robustness of an HDL simulator with the speed of FPGA prototyping boards. The goal is to put together the power of these two verification methodologies into one platform. To read more, click here. » read more

A Broad, Effective Approach to Optimizing for Power
By Wolfgang Helfricht - 15 Jul, 2015 - Comments: 0

As an industry we talk a lot about the challenges of power-aware design and accompanying issues at leading-edge nodes. There’s no denying some tough challenges, but if we’re honest, there are plenty of opportunities we can exploit right now to improve power in our designs. You’ve heard the saying, “death by a thousand cuts?” Well, when it comes to grappling with power in today’s ... » read more

SoC Connectivity Verification Nightmare
By Kiran Vittal - 09 Jul, 2015 - Comments: 0

At the recent 2015 women’s World Cup soccer final in Canada, Japan was completely caught off guard in the first 15 minutes (and 4 seconds) by the USA. They were wary of the “set-piece” play by the USA team, which they were not able to defend against, resulting in the first three goals by the American women. However, the game breaker was the 54-foot midfield hat-trick goal from Carli Lloyd... » read more

Case Studies In Double-Patterning Debug
By David Abercrombie - 18 Jun, 2015 - Comments: 0

Double patterning (DP) impacts just about every part of the design and manufacturing flows. However, the kinds of issues you encounter, the way they manifest themselves, and the ideal way to address them may be very different in different parts of these flows. I feel like I have spent a lot of time the last six months or so working with place and route (P&R) and chip finishing engineers on DP i... » read more

The Interconnect Bottleneck
By Ann Mutschler - 28 May, 2015 - Comments: 0

With communications playing a crucial role in the design and performance of multi-core SoCs, various interconnect structures have been proposed as promising solutions to simplify and optimize SoC design. However, sometimes things don’t go as planned and the interconnect becomes the bottleneck. “Under high utilization cases the DRAM will be over-constrained with requests from all the a... » read more

Tear Down The Wall Between Front-End And Back-End Teams
By Kurt Shuler - 28 May, 2015 - Comments: 0

Because system-on-chip devices are increasingly complex, it is becoming imperative for design teams and organizations to reexamine how they work with one another in order to innovate new ways to improve productivity in delivering devices to market. The area that could benefit most is the divide that separates the semiconductor front-end design process from the physical back-end design process. ... » read more

Design Virtualization And Its Impact On SoC Design
By eSilicon - 27 May, 2015 - Comments: 0

At advanced technology nodes (40nm and below), the number of options that a system-on-chip (SoC) designer faces is exploding. Choosing the correct combination of these options can have a dramatic impact on the quality, performance, cost and schedule of the final SoC. Using conventional design methodologies, it is very difficult to know if the correct options have been chosen. There is simply ... » read more

Ethernet In The Connected World
By Synopsys - 08 Apr, 2015 - Comments: 0

This white paper outlines the latest networking trends across some of the key market sectors including automotive, the connected home and data centers, and explains how Ethernet is relevant to each. It also explains how Synopsys responds to its customers’ needs to develop and offer configurable semiconductor IP that enables system-on-chip (SoC) design teams to quickly and reliably implement E... » read more

Blog Review: April 1
By Jesse Allen - 01 Apr, 2015 - Comments: 0

A Russian plan to build a massive cargo plane to deliver tanks at supersonic speed—A roll of tape coated in squid proteins provides perfect camouflage—A yacht made of volcanic fibers battling the world's roughest seas: Ansys' Justin Nescott finds everything for a James Bond movie in this week's top tech articles. Writing for Synopsys, Broadcom's Hari Balisetty looks at reusable sequences... » read more

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