Memory, Bandwidth And SoC Performance


By Ann Steffora Mutschler High-end SoC architectures today can contain dozens of processing engines—multiple cores from MIPS and ARM, DSPs from Tensilica and CEVA, and even graphics processors. But with so many cores there also is a need for enormous amounts of memory, and that has been creating some unexpected design problems, In many cases so much memory is required for an SoC that some... » read more

The Growing Importance Of Subsystems


By Ed Sperling A growing reliance on third-party IP is beginning to expand well beyond just IP blocks and into full subsystems, opening significant growth opportunities for companies competing in this market as well as enormous business and technical challenges. The IP market is ripe for this kind of convergence. Complexity at advanced process nodes coupled with time-to-market demands has e... » read more

Stuck In The Corners


It’s common for semiconductor design teams to spend 60% to 70% of product development time on verification, which is why verification has bubbled to the top of the management chain as a concern. Executives worry about the predictability of their product development cycle because so much of it is dependent on successful execution of verification, the ability to achieve coverage closure and the... » read more

Bridging The Gap


By Frank Ferro Today’s industry shows are feeling a lot like deja vu…tablets, tablets, smartphones, smartphones. The recent CES felt very similar to Mobile World Congress (MWC) with all the emphasis on smart phones and pad computing. When I first started attending MWC—it was called 3GSM in those days and held in France—semiconductor companies seemed somewhat misplaced because 3GSM w... » read more

Experts At The Table: 3D Stacking


By Ed Sperling Semiconductor Manufacturing and Design sat down with Riko Radojcic, director of engineering at Qualcomm; Drew Wingard, CTO at Sonics; Michael White, senior product marketing manager for Calibre physical verification at Mentor Graphics; Jim Hogan, a Silicon Valley venture capitalist; Prasad Subramaniam, vice president of design technology at eSilicon; and Mike Gianfagna, vice pre... » read more

3D Stacking: Reality Check


Semiconductor Manufacturing & Design examines the myth and reality of 3D stacking--and the hurdles that still need to be solved. In the hot seat: VC Jim Hogan; eSilicon's Prasad Subramanian; Sonics' Drew Wingard; Atrenta's Mike Gianfagna, and Mentor Graphics' Michael White. [youtube vid=fWQUGgwC-F4] » read more

The Quest To Better Define Applications


By Ed Sperling For nearly five decades, just being able to get software to run on hardware and communicate with other systems was considered a feat of engineering. But with that part of the technology solved well enough, the next big challenge is to make sure that applications can run as efficiently as possible to maximize performance, minimize power consumption and limit the area required to ... » read more

Connecting System-Level Flows To Implementation Tools


By Ann Steffora Mutschler With the complexity explosion occurring in SoC design today, there is a relentless force to push design decisions further up in terms of abstraction. Resolving issues at the gate level is not possible any more because there just isn’t enough time or resources. Further, the resulting design may not even be competitive because optimization at the gate level can leave ... » read more

Tailoring IP, Tools And Flows


By Ann Steffora Mutschler As SoC and system complexity rises continually and software drives much more in a system, specific vertical application areas will require tailored IP and tool flows to allow designers to meet time-to-market demands. Today, many systems are designed around a platform, which contains most of the STAR IP—processors, GPUs, memory controllers, interconnects, memory s... » read more

The Quest To Better Define Applications


By Ed Sperling For nearly five decades, just being able to get software to run on hardware and communicate with other systems was considered a feat of engineering. But with that part of the technology solved well enough, the next big challenge is to make sure that applications can run as efficiently as possible to maximize performance, minimize power consumption and limit the area required to ... » read more

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