One-On-One: Aaron Thean

By Mark LaPedus - 22 Jan, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss process technology, transistor trends and other topics with Aaron Thean, vice president of process technologies and director of the logic devices R&D program at Imec. SE: Chipmakers are ramping up the 16nm/14nm logic node, with 10nm and 7nm in R&D. What’s the current timeline for 10nm and 7nm? Thean: 10nm is on its way. We will see r... » read more

Fab Tool R&D And Ramen Noodles

By Mark LaPedus - 22 Jan, 2015 - Comments: 0

The semiconductor equipment and materials industry has always been a tough business. Over the years, vendors have been under pressure to develop new technologies for a shrinking but demanding customer base. And as a result, many vendors could not keep up, or elected to exit the business, causing a massive shakeout in the industry. It isn’t getting any easier, though. Today, tool and... » read more

Designing For Security

By Ernest Worthman - 08 Jan, 2015 - Comments: 0

Stacked die may improve performance and lower power, but the use of [getkc id="203" kc_name="through-silicon vias"] (TSVs) could add new security risks. As IC structures go, the vertical component of these chip packages is both a boon and a bust. Three-dimensional geometries allow for much less complexity in design by stacking two-dimensional dies and interconnecting them in the third dimens... » read more

Is The Stacked Die Ecosystem Stagnating?

By Ann Mutschler - 23 Dec, 2014 - Comments: 0

While the stacked die ecosystem in general is currently status quo, with not much happening in the past year, there is definitely work being done —albeit cautiously—on the design tools side of things. It would be easy to feel impatient that the design tools are not complete and available today for [getkc id="82" comment="2.5D"] and [getkc id="42" comment="3D IC"] implementation until hearin... » read more

Trouble Spots And Optimism For 2015

By Ed Sperling - 18 Dec, 2014 - Comments: 0

Most top executives in the semiconductor industry are bullish about 2015 and even beyond, particularly as the [getkc id="76" comment="Internet of Things"] begins to drive new markets and market mash-ups, and as more semiconductors find their way into markets such as automotive, health-care and manufacturing. But it's not an entirely rosy picture, and top executives point to potential trouble sp... » read more

Is The Stacked Die Ecosystem Stagnating?

By Ann Mutschler - 18 Dec, 2014 - Comments: 2

It is now widely agreed that not much has been happening in terms of adoption for 2.5D interposer and 3D ICs. “It seems like everyone is still at the starting line waiting for the race to begin," said Javier DeLaCruz, senior director of engineering of [getentity id="22242" e_name="eSilicon"]. "Interposer assembly and IP availability for effectively using the [getkc id="82" comment="2.5D IC... » read more

System Bits: Dec. 16

By Ann Mutschler - 16 Dec, 2014 - Comments: 0

High rise chip For decades, the mantra of the semiconductor industry has been ‘smaller, faster, cheaper.’ Stanford researchers are also adding ‘taller’ to the mix, and describing how to build high-rise chips that promise to leapfrog the performance of the single-story logic and memory chips on today's circuit cards. Stanford researchers said their approach would end the ‘logjams�... » read more

See The Internet Of Things…In 3D

By Steve Schulz - 05 Dec, 2014 - Comments: 0

No, you don’t need 3D glasses to experience two of the hottest emerging technology trends in electronics — just take advantage of the longest running conference series on the topic of 3-D integrated circuits. Now in its 11th year, the 3D Architectures for Semiconductor Integration and Packaging conference will take place in San Francisco next week. The event will feature two pre-conference ... » read more

Signal And Power Integrity Cross Paths

By Ed Sperling - 05 Dec, 2014 - Comments: 2

Signal integrity and power integrity historically have been relatively independent issues, and engineers with expertise in one area generally operate independently of the other. But as more power domains are added to conserve energy and allow more features, as voltages are reduced to save battery life, and as dynamic power becomes more of a concern at advanced nodes, these worlds are suddenly m... » read more

The Internet Of Cores

By Brian Bailey - 20 Nov, 2014 - Comments: 0

Ever since the birth of the third-party [getkc id="43" comment="IP"] market, there has been a desire for plug-and-play compatibility between cores. Part of the value proposition of reuse is that a block has been used before, and has been verified and validated by having been implemented in silicon. By re-using the core, many of these tasks no longer land on the [getkc id="81" kc_name="SoC"] dev... » read more

← Older posts Newer posts →

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: stacked die

One-On-One: Aaron Thean

Fab Tool R&D And Ramen Noodles

Designing For Security

Is The Stacked Die Ecosystem Stagnating?

Trouble Spots And Optimism For 2015

Is The Stacked Die Ecosystem Stagnating?

System Bits: Dec. 16

See The Internet Of Things…In 3D

Signal And Power Integrity Cross Paths

The Internet Of Cores