tag: STMicroelectronics

Filling In The Gaps For Mixed-Signal Verification
By Ann Mutschler - 24 Nov, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss mixed-signal verification with Haiko Morgenstern, Mixed-Signal Verification Group Staff Engineer at Infineon; Dr. Gernot Koch, CAD Manager at Micronas; Pierluigi Daglio, AMS Design Verification Flows Manager at STMicroelectronics; and Helene Thibieroz, AMS marketing manager at [getentity id="22035" e_name="Synopsys"]. What follows are excerpts of th... » read more

RF SOI Foundry Biz Heats Up
By Mark LaPedus - 13 Nov, 2014 - Comments: 0

The foundry business is undergoing a new round of acquisition and fab expansion activity. As before, the big foundry vendors are getting bigger, while some may fall by the wayside. And at times, the events cause some uncertainty, if not jitters, in the supply chain. For example, [getentity id="22819" comment="GlobalFoundries"]in October signed a definitive agreement to acquire the chip uni... » read more

Designing For Energy Efficiency
By Ed Sperling - 06 Nov, 2014 - Comments: 0

Swiss watchmakers have nothing to worry about for the moment. As top-name companies crowd into the wearable market with full-featured watches, limits on battery life and frequent charges undoubtedly will limit their popularity. Smart watches look cool or clunky, depending upon your perspective, but none of them lasts long enough between charges to be a serious market contender. That's certai... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 31 Oct, 2014 - Comments: 0

STMicroelectronics announced mixed results for the quarter. The company also launched a plan to cut $100 million in costs. As part of the plan, it is reviewing the implications to its process technology efforts following the recent announcements by its research alliance partners, namely IBM. STMicro is one of the main drivers of FDSOI technology. The company’s FDSOI partner is IBM, which is s... » read more

Filling In The Gaps For Mixed-Signal Verification
By Ann Mutschler - 31 Oct, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss mixed-signal verification with Haiko Morgenstern, Mixed-Signal Verification Group Staff Engineer at Infineon; Dr. Gernot Koch, CAD Manager at Micronas; Pierluigi Daglio, AMS Design Verification Flows Manager at STMicroelectronics; and Helene Thibieroz, AMS marketing manager at [getentity id="22035" comment="Synopsys"]. What follows are excerpts of t... » read more

Securing The IoT
By Ed Sperling - 27 Oct, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss whether the [getkc id="76" comment="Internet of Things"] will be secure enough, or whether it will create new security issues, with Sami Nassar, general manager of [getentity id="22499" comment="NXP Semiconductor"]; Oleg Logvinov, director for special assignments at [getentity id="22331" comment="STMicroelectronics"]; and Lawrence Loh, application e... » read more

Filling In The Gaps For Mixed-Signal Verification
By Ann Mutschler - 24 Oct, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss mixed-signal [getkc id="10" kc_name="Verification"] with Haiko Morgenstern, Mixed-Signal Verification Group Staff Engineer at Infineon; Dr. Gernot Koch, CAD Manager at Micronas; Pierluigi Daglio, AMS Design Verification Flows Manager at STMicroelectronics; and Helene Thibieroz, AMS marketing manager at [getentity id="22035" comment="Synopsys"]. What... » read more

Securing The IoT
By Ed Sperling - 20 Oct, 2014 - Comments: 1

Semiconductor Engineering sat down to discuss whether the [getkc id="76" comment="Internet of Things"] will be secure enough, or whether it will create new security issues, with Sami Nassar, general manager of [getentity id="22499" comment="NXP Semiconductor"]; Oleg Logvinov, director for special assignments at [getentity id="22331" comment="STMicroelectronics"]; and Lawrence Loh, application e... » read more

Time To Look At SOI Again
By Mark LaPedus - 16 Oct, 2014 - Comments: 0

Chipmakers have the luxury of looking at several process options when developing chips at the 28nm node and beyond. Using bulk CMOS, for example, chipmakers can scale planar transistors down to 20nm. Then, at 20nm, planar runs out of gas due to the so-called short-channel effect. At that point, IC makers must migrate towards finFETs at 16nm/14nm and beyond. Another process option is fully... » read more

Manufacturing Bits: Oct. 14
By Mark LaPedus - 14 Oct, 2014 - Comments: 0

Toyota’s power steering IC Today’s cars are making use of more electronics. The increase in electronic content is driving the need for high temperature and high voltage chips. The electric power steering (EPS) system is one example. EPS provides power assist even when the engine is stopped. It also improves fuel economy compared to hydraulic power steering, according to automotive giant... » read more

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