tag: STMicroelectronics

Don’t miss Fully-Depleted Tech Symposium during IEDM (SF)
By Various Writers - 04 Dec, 2012 - Comments: 0

Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News ~  ~ If you want to cut through the noise surrounding the choices for 28nm and beyond, an excellent place to start is the SOI Consortium’s Fully Depleted Technology Symposium. As a member of the design and manufacturing communities, this is your chance to see and hear what industry leaders are actually doing. Planar? F... » read more

MEMS Goes Mainstream
By Ed Sperling - 29 Nov, 2012 - Comments: 0

By Cheryl Coupé Micro-electromechanical systems (MEMS) are well known for enabling innovative capabilities for devices that range from vehicles and gaming to smartphones and tablets—and increasingly in personal health and fitness, security, and environmental applications. As stacked die become more popular, they also will become part of the integration challenge that chipmakers will wrestle... » read more

How To Make A Brain-On-A-Chip
By Mark LaPedus - 15 Nov, 2012 - Comments: 0

By Mark LaPedus In October, Draper Laboratory and the University of South Florida (USF) disclosed an ambitious plan to develop a brain-on-a-chip. The idea is to devise a “micro-environment’’ that mimics the human brain. Researchers hope to study neurodegenerative conditions such as Alzheimer’s disease, strokes and concussions. The eventual goal is to study the effects of drugs and v... » read more

Quantum Shifts
By Ed Sperling - 25 Oct, 2012 - Comments: 0

By Ed Sperling Intel, STMicroelectronics and some of the leading memory providers already are working on 10nm process technology, and advanced researchers in universities and industry-leading companies are looking at 7nm, 5nm and even beyond. Those who have glimpsed this technological future have similar observations. There is no single technology problem that has to be solved at these node... » read more

Moore’s Law Revisited
By Ed Sperling - 25 Oct, 2012 - Comments: 0

It’s no surprise that Moore’s Law can continue for many more generations. Intel’s road map already extends down to 5nm, most likely with carbon nanotube FETs, tunnel FETs, graphene TSVs and maybe even fully depleted SOI to replace bulk CMOS. The rest of the industry has been hanging back a node or two, gliding on the coattails of what Intel and companies like IBM, Samsung and STMicroel... » read more

Thanks For The Memories
By Ed Sperling - 27 Sep, 2012 - Comments: 0

By Ed Sperling The amount of real estate in a design now devoted to memories—SRAM on chip, DRAM off chip, and a few other more exotic options showing up occasionally—is a testament to the amount of data that needs to be utilized quickly in both mobile and fixed devices. Memory is almost singlehandedly responsible for the routing congestion now plaguing complex SoCs. It is one of the mai... » read more

Where Does It Hurt?
By Ed Sperling - 27 Sep, 2012 - Comments: 0

By Ed Sperling The IC design industry is feeling a new kind of pain—this one driven by uncertainty over architectural shifts, new ecosystem interactions and new ways to account for costs. As mainstream ICs move from 50/45/40nm to around 32/28/22nm, there are only two choices for design teams—continue shrinking features or stack dies. In many cases, the ultimate solution may be a combina... » read more

The Good And Bad Of Models
By Ed Sperling - 27 Sep, 2012 - Comments: 0

By Ann Steffora Mutschler Driven by fierce competition and the fact that socket decisions are made long before silicon is manufactured, semiconductor companies today ship models and virtual prototypes to their OEMs very early in hopes of locking in the socket. Admittedly, this has been happening for some time, but due to complexity and the need for flexibility of models and virtual platf... » read more

Quiet, Steady And Sometimes Unexpected Advances For SOI
By Ed Sperling - 20 Sep, 2012 - Comments: 0

By Ed Sperling After years of talking about equivalent pricing, technical advantages and consistent processes, silicon on insulator finally appears to be making significant inroads—but not necessarily in ways, places, or even at process nodes where it initially was predicted to gain ground. What’s driving at least some of this change is the semiconductor industry’s progression toward ... » read more

Inflection Points Ahead
By Ed Sperling - 23 Aug, 2012 - Comments: 0

By Ed Sperling Engineering challenges have existed at every process node in semiconductor designs, but at 20nm and beyond, engineers and executives on all sides of the industry are talking about inflection points. An inflection point is literally the place where a curve on a graph turns down or up, but in the semiconductor industry it’s usually associated with the point at which a progres... » read more

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