Stacking The Deck


By Javier DeLaCruz The pinnacle of system-on-chip has passed. There are several dynamics that are moving the industry away from the SoC philosophy that was so popular just a few short years ago. One of the significant factors is that the cost per gate for CMOS nodes below 28nm is rising for the first time in the history of our industry. Another critical factor is the emergence of through-silic... » read more

Experts At The Table: 450mm Fab And Facilities Challenges


Semiconductor Manufacturing & Design sat down to discuss future 450mm fab and facilities challenges with Gerald Goff, director of the project management office for fab design and construction at GlobalFoundries; Joe Cestari, president of Total Facility Solutions; Ivo Raaijmakers, chief technology officer of ASM International; and Michael Brain, senior director of the Fab Solutions Business... » read more

3D IC Supply Chain: Still Under Construction


By Barbara Jorgensen and Ed Sperling Stacked die, which promise high levels of integration, a tiny footprint, energy conservation and blinding speed, still have some big hurdles to overcome. Cost, packaging and manufacturability continue to make steady progress, with test chips being produced by all of the major foundries. But in a disaggregated ecosystem, the supply chain remains a big st... » read more

De-Mystifying The SoC Supply Chain


By Barbara Jorgensen At the heart of every supply chain operation is the desire to mitigate risk. In theory, a supply chain allows a customer to leverage the best of the best in technology, logistics or production at a lower cost than DIY (do it yourself.) The system on chip (SoC) supply chain is no different—there’s a whole ecosystem in the semiconductor industry that supports design, pro... » read more

The Week In Review: June 21


By Ed Sperling Mentor Graphics rolled out emulation-ready verification IP for MIPI camera and display-based protocols. The VIP enables stimuli generated by UVM and SystemC-based environments and applies them to a design under test (DUT) running in the emulator. Synopsys introduced a tool for implementing and verifying functional engineering change orders, including matching, visualization ... » read more

Experts At The Table: Changes In The Ecosystem


By Ed Sperling Semiconductor Manufacturing & Design sat down with Michael Buehler-Garcia, director of design solutions marketing at Mentor Graphics; Seow Yin Lim, group director for marketing at Cadence; Kevin Kranen, director of strategic alliances at Synopsys, and Tom Quan, director at TSMC. What follows are excerpts of that conversation. SMD: What’s changing in the ecosystem and ho... » read more

Manufacturing Ecosystem Challenges


What are the challenges facing semiconductor manufacturers and designers at the leading edge of Moore's Law? Semiconductor Manufacturing & Design asked Kevin Kranen of Synopsys, Seow Yin Lim of Cadence, Michael Buehler-Garcia of Mentor Graphics and Tom Quan of TSMC. [youtube vid=d6-zMJSxnpg] » read more

Executive Briefing: Stacking The Odds


Open-Silicon CEO Naveed Sherwani talks with System-Level Design about progress on 2.5D and 3D stacked die, why this approach is inevitable, when it will begin and what markets will use it first. [youtube vid=mzwpgDKuIok] » read more

Beyond Software: The Virtual-Machine Supply System


It’s no secret that EDA and IP companies have had to expand their coverage into the larger system market, thanks to changes in the semiconductor supply chain. Around 2000, the industry was very fragmented. Mobile-chip and IP vendors worked with handset makers, who then partnered with operating-system (OS) suppliers and finally network operators. The next 12 years resulted in various combinati... » read more

Supply Chain Catch-Up


There always will be a few big companies marching to the latest process node available to them. The problem these days isn’t their commitment to pushing forward. It’s the baggage train following them. It’s getting longer, more diverse, and in some cases, it’s falling out of sync. The foundries are out in front with 14nm finFETs, and they’re already working on 10nm transistors—pos... » read more

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