tag: Synopsys

Roaring ’20s For The Chip Industry
By Brian Bailey - 28 Jan, 2021 - Comments: 0

2020 was a good year for the semiconductor industry and the EDA industry that fuels it, but 2021 has the opportunity to be even better. New end application markets continue to open, and what were once seen as technical hurdles are leading to a multitude of innovative solutions, all of which need suitable tooling. No company can afford to invest everywhere, and so for EDA companies, their rel... » read more

Big Changes In Verification
By Ann Mutschler - 28 Jan, 2021 - Comments: 0

Verification is undergoing fundamental change as chips become increasingly complex, heterogeneous, and integrated into larger systems. Tools, methodologies, and the mindset of verification engineers themselves are all shifting to adapt to these new designs, although with so many moving pieces this isn't always so easy to comprehend. Ferreting out bugs in a design now requires a multi-faceted... » read more

Blog Review: Jan. 27
By Jesse Allen - 27 Jan, 2021 - Comments: 0

Synopsys' Godwin Maben finds that applications like high-performance computing and AI are bringing new dynamics to the power equation, and the key power considerations for chip design that will likely emerge over the course of the year. Siemens EDA's Harry Foster checks out trends in verification technology adoption for IC and ASIC design, with increasing numbers of designs using both dynami... » read more

Data Overload In The Data Center
By Ed Sperling - 25 Jan, 2021 - Comments: 0

Dealing with increasing volumes of data inside of data centers requires an understanding of architectures, the flow of data between memory and processors, bandwidth, cache coherency and new memory types and interfaces. Gary Ruggles, senior product marketing manager at Synopsys, talks about how these systems are being revamped to improve performance and reduce power. » read more

Customer-Developed, Hyper-Convergent Design Flows Are Now Possible
By John Faase - 25 Jan, 2021 - Comments: 0

We all know the days of sequential, compartmentalized chip design are over. In advanced technology nodes, placement impacts performance, performance impacts power, and routing impacts everything. The way to manage these challenges is to interleave design tasks. For example, provide information on late-stage routing to early-stage synthesis tools to improve convergence. This technique is commonl... » read more

Week In Review: Design, Low Power
By Jesse Allen - 22 Jan, 2021 - Comments: 0

Cadence will acquire NUMECA International, a provider of computational fluid dynamics (CFD), mesh generation, multi-physics simulation, and optimization solutions for industries including aerospace, automotive, industrial, and marine. “Next-generation products and systems require comprehensive multi-physics engineering solutions encompassing IP, semiconductors, IC packaging, modules, board... » read more

Blog Review: Jan. 20
By Jesse Allen - 20 Jan, 2021 - Comments: 0

Siemens EDA's Harry Foster takes a look at the amount of time IC and ASIC projects spend in verification, changes in the number of engineers on a project, and how engineers are spending their time. Synopsys' Stelios Diamantidis considers the importance of specialized accelerators for AI workloads as both cloud and edge push the PPA limits of current technologies. Cadence's Paul McLellan p... » read more

Hidden Costs In Faster, Low-Power AI Systems
By Ed Sperling - 20 Jan, 2021 - Comments: 1

Chipmakers are building orders of magnitude better performance and energy efficiency into smart devices, but to achieve those goals they also are making tradeoffs that will have far-reaching, long-lasting, and in some cases unknown impacts. Much of this activity is a direct result of pushing intelligence out to the edge, where it is needed to process, sort, and manage massive increases in da... » read more

Von Neumann Is Struggling
By Brian Bailey - 18 Jan, 2021 - Comments: 5

In an era dominated by machine learning, the von Neumann architecture is struggling to stay relevant. The world has changed from being control-centric to one that is data-centric, pushing processor architectures to evolve. Venture money is flooding into domain-specific architectures (DSA), but traditional processors also are evolving. For many markets, they continue to provide an effective s... » read more

Week In Review: Design, Low Power
By Jesse Allen - 15 Jan, 2021 - Comments: 0

Qualcomm will acquire data center chip startup Nuvia for approximately $1.4 billion. Nuvia is working on a data center SoC and Arm-based CPU core it claims will lower performance per total cost of ownership by matching high performance with high efficiency and limiting maximum power to that which can be dissipated in an air-cooled environment. Qualcomm said Nuvia's technology would be incorpora... » read more

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