Power Complexity On The Rise


New chip architectures and custom applications are adding significant challenges to chip design and verification, and the problems are becoming much more complex as low power is added into the mix. Power always has been a consideration in design, but in the past it typically involved different power domains that were either on, off, or in some level of sleep mode. As hardware architectures s... » read more

Blog Review: Nov. 13


Applied Materials' Buvna Ayyagari-Sangamalli argues that the siloed structure that produced the computing eras of the past will not be sufficient to fuel the AI era and that a new codesign approach to everything from architecture to materials is needed. Arm's Wendy Elsasser examines emerging non-volatile memories and how they have triggered innovation for new memory protocols and optimized s... » read more

Verdi Transaction Debug Solution: Unified Performance Analysis And Debug For Interconnect


In modern systems on chip (SoCs), where Arm AMBA protocols are intensively used as standard intellectual property (IP) interfaces, the interconnect is usually required to bridge and facilitate the communication between many different IP interfaces. The interconnect presents one of the biggest challenges of SoC verification, considering the different kinds of protocol interfaces, conversion of d... » read more

Leveraging Data In Chipmaking


John Kibarian, president and CEO of PDF Solutions, sat down with Semiconductor Engineering to talk about the impact of data analytics on everything from yield and reliability to the inner structure of organizations, how the cloud and edge will work together, and where the big threats are in the future. SE: When did you recognize that data would be so critical to hardware design and manufact... » read more

Week In Review: Design, Low Power


Cadence unveiled a static timing/signal integrity analysis and power integrity analysis tool, Tempus Power Integrity Solution, that integrates the Tempus Timing Signoff and Voltus IC Power Integrity signoff engines. Early use cases demonstrated it correctly identified IR drop errors, avoiding silicon failure prior to tapeout and improving the maximum frequency in silicon by up to 10%. Arasan... » read more

Planning For Failures In Automotive


The automotive industry is undergoing some fundamental shifts as it backs away from the traditional siloed approach to one of graceful failure, slowing the evolution to fully autonomy and rethinking how to achieve its goals for a reasonable cost. For traditional automakers, this means borrowing some proven strategies from the electronics world rather than trying to evolve traditional automot... » read more

Traceability Of Functional Safety Requirements In Automotive IP And SoCs


By Shivakumar Chonnad, Vladimir Litovtchenko, and Rohit Bhardwaj Developing functional safety systems, including all the components such as the system-on-chip (SoC) and IP, hinges on the ability to meet the stringent automotive functional safety requirements such as definition, implementation, verification, and validation. Depending on the Automotive Safety Integrity Level (ASIL), the functi... » read more

How Secure Is Your Face?


Biometric security, which spans everything from iris scans to fingerprint sensors, is undergoing the same kind of race against hackers as every other type of sensor. While most of these systems work well enough to identify a person, there are a number of well-known ways to defeat them. One is simply to apply newer technology to cracking algorithms used inside these devices. Improvements in p... » read more

Securing The Modern Vehicle


For far too long, we’ve lacked the data needed to fully understand how effective the automotive industry is at addressing the software security risks inherent in connected, software-enabled vehicles. Synopsys and SAE International partnered to commission this independent survey of the current cybersecurity practices in the automotive industry to fill this information gap. Click here to rea... » read more

Blog Review: Nov. 6


Cadence's Paul McLellan considers why high-performance compute, high-performance networks, and security will all be vital to the next wave of devices and the importance of optimization. Synopsys' Taylor Armerding points to some best practices for assessing your supply chain to find the weak links that could lead to a security breach, from why to make it a priority to what to ask software ven... » read more

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